From patchwork Tue Feb 23 15:52:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Marchi X-Patchwork-Id: 11017 Received: (qmail 32302 invoked by alias); 23 Feb 2016 15:52:12 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 32288 invoked by uid 89); 23 Feb 2016 15:52:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=uint16_t, 0xf, op1, 0xc X-HELO: usplmg21.ericsson.net Received: from usplmg21.ericsson.net (HELO usplmg21.ericsson.net) (198.24.6.65) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 23 Feb 2016 15:52:10 +0000 Received: from EUSAAHC008.ericsson.se (Unknown_Domain [147.117.188.96]) by usplmg21.ericsson.net (Symantec Mail Security) with SMTP id 20.99.32102.E008CC65; Tue, 23 Feb 2016 16:51:43 +0100 (CET) Received: from elxcz23q12-y4.dyn.mo.ca.am.ericsson.se (147.117.188.8) by smtps-am.internal.ericsson.com (147.117.188.96) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 23 Feb 2016 10:52:08 -0500 From: Simon Marchi To: CC: Simon Marchi Subject: [PATCH] arm-tdep.c: Remove unsued "to" parameters Date: Tue, 23 Feb 2016 10:52:04 -0500 Message-ID: <1456242724-5166-1-git-send-email-simon.marchi@ericsson.com> MIME-Version: 1.0 X-IsSubscribed: yes gdb/ChangeLog: * arm-tdep.c (arm_decode_svc_copro): Remove "to" parameter. (thumb_process_displaced_insn): Likewise. (arm_process_displaced_insn): Adjust calls. --- gdb/arm-tdep.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 1a3a209..17f6fc6 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -6741,7 +6741,7 @@ thumb2_decode_ext_reg_ld_st (struct gdbarch *gdbarch, uint16_t insn1, } static int -arm_decode_svc_copro (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to, +arm_decode_svc_copro (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs, struct displaced_step_closure *dsc) { unsigned int op1 = bits (insn, 20, 25); @@ -7446,7 +7446,7 @@ thumb_process_displaced_32bit_insn (struct gdbarch *gdbarch, uint16_t insn1, static void thumb_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from, - CORE_ADDR to, struct regcache *regs, + struct regcache *regs, struct displaced_step_closure *dsc) { enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); @@ -7487,7 +7487,7 @@ arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from, dsc->wrote_to_pc = 0; if (!displaced_in_arm_mode (regs)) - return thumb_process_displaced_insn (gdbarch, from, to, regs, dsc); + return thumb_process_displaced_insn (gdbarch, from, regs, dsc); dsc->is_thumb = 0; dsc->insn_size = 4; @@ -7518,7 +7518,7 @@ arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from, break; case 0xc: case 0xd: case 0xe: case 0xf: - err = arm_decode_svc_copro (gdbarch, insn, to, regs, dsc); + err = arm_decode_svc_copro (gdbarch, insn, regs, dsc); break; }