diff mbox

[3/4] sim: bfin: add support disasm tracing

Message ID 1451536348-31380-4-git-send-email-vapier@gentoo.org
State Committed
Delegated to: Mike Frysinger
Headers show

Commit Message

Mike Frysinger Dec. 31, 2015, 4:32 a.m. UTC
---
 sim/bfin/interp.c | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index 2da70b5..c71b0a2 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -620,6 +620,8 @@  step_once (SIM_CPU *cpu)
     trace_prefix (sd, cpu, NULL_CIA, oldpc, TRACE_LINENUM_P (cpu),
 		  NULL, 0, " "); /* Use a space for gcc warnings.  */
 
+  TRACE_DISASM (cpu, oldpc);
+
   /* Handle hardware single stepping when lower than EVT3, and when SYSCFG
      has already had the SSSTEP bit enabled.  */
   ssstep = false;