[v5,4/7] Share regcache function regcache_raw_read_unsigned.
Commit Message
In this v5:
* Change syscall_next_pc to use regcache and share the stack layout code
with GDB.
* Change is_thumb to be an operation rather than a variable
in arm_get_next_pcs.
* Remove arm_apcs32 from arm_get_next_pcs.
* Remove arm_gdb_get_next_pcs.
---
This patch is in preparation for software single step support on ARM in
GDBServer. It adds a new shared function regcache_raw_read_unsigned so
that GDB and GDBServer can use the same call to fetch a raw register into
an integer.
No regressions, tested on ubuntu 14.04 ARMv7 and x86.
With gdbserver-{native,extended} / { -marm -mthumb }
gdb/ChangeLog:
* common/common-regcache.h (register_status) New enum.
(regcache_raw_read_unsigned): New declaration.
* regcache.h (enum register_status): Move to common-regcache.h.
(regcache_raw_read_unsigned): Likewise.
gdb/gdbserver/ChangeLog:
* regcache.c (init_register_cache): Initialize cache to
REG_UNAVAILABLE.
(regcache_raw_read_unsigned): New function.
* regcache.h (REG_UNAVAILABLE, REG_VALID): Replaced by shared
register_status enum.
---
gdb/common/common-regcache.h | 22 ++++++++++++++++++++++
gdb/gdbserver/regcache.c | 26 ++++++++++++++++++++++++--
gdb/gdbserver/regcache.h | 7 -------
gdb/regcache.h | 21 ---------------------
4 files changed, 46 insertions(+), 30 deletions(-)
Comments
On 12/04/2015 08:13 AM, Antoine Tremblay wrote:
> In this v5:
>
> * Change syscall_next_pc to use regcache and share the stack layout code
> with GDB.
> * Change is_thumb to be an operation rather than a variable
> in arm_get_next_pcs.
> * Remove arm_apcs32 from arm_get_next_pcs.
> * Remove arm_gdb_get_next_pcs.
>
Oops these comments are meant for patch 5/7.
@@ -22,6 +22,24 @@
/* This header is a stopgap until we have an independent regcache. */
+enum register_status
+ {
+ /* The register value is not in the cache, and we don't know yet
+ whether it's available in the target (or traceframe). */
+ REG_UNKNOWN = 0,
+
+ /* The register value is valid and cached. */
+ REG_VALID = 1,
+
+ /* The register value is unavailable. E.g., we're inspecting a
+ traceframe, and this register wasn't collected. Note that this
+ is different a different "unavailable" from saying the register
+ does not exist in the target's architecture --- in that case,
+ the target should have given us a target description that does
+ not include the register in the first place. */
+ REG_UNAVAILABLE = -1
+ };
+
/* Return a pointer to the register cache associated with the
thread specified by PTID. This function must be provided by
the client. */
@@ -38,4 +56,8 @@ extern int regcache_register_size (const struct regcache *regcache, int n);
extern CORE_ADDR regcache_read_pc (struct regcache *regcache);
+/* Read a raw register into a unsigned integer. */
+extern enum register_status regcache_raw_read_unsigned
+ (struct regcache *regcache, int regnum, ULONGEST *val);
+
#endif /* COMMON_REGCACHE_H */
@@ -145,8 +145,9 @@ init_register_cache (struct regcache *regcache,
= (unsigned char *) xcalloc (1, tdesc->registers_size);
regcache->registers_owned = 1;
regcache->register_status
- = (unsigned char *) xcalloc (1, tdesc->num_registers);
- gdb_assert (REG_UNAVAILABLE == 0);
+ = (unsigned char *) xmalloc (tdesc->num_registers);
+ memset ((void *) regcache->register_status, REG_UNAVAILABLE,
+ tdesc->num_registers);
#else
gdb_assert_not_reached ("can't allocate memory from the heap");
#endif
@@ -435,6 +436,27 @@ collect_register (struct regcache *regcache, int n, void *buf)
register_size (regcache->tdesc, n));
}
+enum register_status
+regcache_raw_read_unsigned (struct regcache *regcache, int regnum,
+ ULONGEST *val)
+{
+ int size;
+
+ gdb_assert (regcache != NULL);
+ gdb_assert (regnum >= 0 && regnum < regcache->tdesc->num_registers);
+
+ size = register_size (regcache->tdesc, regnum);
+
+ if (size > (int) sizeof (ULONGEST))
+ error (_("That operation is not available on integers of more than"
+ "%d bytes."),
+ (int) sizeof (ULONGEST));
+
+ collect_register (regcache, regnum, val);
+
+ return REG_VALID;
+}
+
#ifndef IN_PROCESS_AGENT
void
@@ -24,13 +24,6 @@
struct thread_info;
struct target_desc;
-/* The register exists, it has a value, but we don't know what it is.
- Used when inspecting traceframes. */
-#define REG_UNAVAILABLE 0
-
-/* We know the register's value (and we have it cached). */
-#define REG_VALID 1
-
/* The data for the register cache. Note that we have one per
inferior; this is primarily for simplicity, as the performance
benefit is minimal. */
@@ -47,24 +47,6 @@ extern struct gdbarch *get_regcache_arch (const struct regcache *regcache);
extern struct address_space *get_regcache_aspace (const struct regcache *);
-enum register_status
- {
- /* The register value is not in the cache, and we don't know yet
- whether it's available in the target (or traceframe). */
- REG_UNKNOWN = 0,
-
- /* The register value is valid and cached. */
- REG_VALID = 1,
-
- /* The register value is unavailable. E.g., we're inspecting a
- traceframe, and this register wasn't collected. Note that this
- is different a different "unavailable" from saying the register
- does not exist in the target's architecture --- in that case,
- the target should have given us a target description that does
- not include the register in the first place. */
- REG_UNAVAILABLE = -1
- };
-
enum register_status regcache_register_status (const struct regcache *regcache,
int regnum);
@@ -78,9 +60,6 @@ void regcache_raw_write (struct regcache *regcache, int rawnum,
extern enum register_status
regcache_raw_read_signed (struct regcache *regcache,
int regnum, LONGEST *val);
-extern enum register_status
- regcache_raw_read_unsigned (struct regcache *regcache,
- int regnum, ULONGEST *val);
extern void regcache_raw_write_signed (struct regcache *regcache,
int regnum, LONGEST val);
extern void regcache_raw_write_unsigned (struct regcache *regcache,