From patchwork Fri Oct 2 11:23:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 8913 Received: (qmail 109231 invoked by alias); 2 Oct 2015 11:24:11 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 109142 invoked by uid 89); 2 Oct 2015 11:24:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-pa0-f46.google.com Received: from mail-pa0-f46.google.com (HELO mail-pa0-f46.google.com) (209.85.220.46) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 02 Oct 2015 11:24:09 +0000 Received: by pacfv12 with SMTP id fv12so106860940pac.2; Fri, 02 Oct 2015 04:24:07 -0700 (PDT) X-Received: by 10.69.3.228 with SMTP id bz4mr19651310pbd.79.1443785047865; Fri, 02 Oct 2015 04:24:07 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (power-aix.osuosl.org. [140.211.15.154]) by smtp.gmail.com with ESMTPSA id yq2sm11561338pbb.39.2015.10.02.04.24.06 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Oct 2015 04:24:07 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: marcus.shawcroft@gmail.com Cc: gdb-patches@sourceware.org, binutils@sourceware.org Subject: [PATCH 2/3] [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn Date: Fri, 2 Oct 2015 12:23:58 +0100 Message-Id: <1443785039-24602-3-git-send-email-yao.qi@linaro.org> In-Reply-To: <1443785039-24602-1-git-send-email-yao.qi@linaro.org> References: <1443785039-24602-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes We want to use disas_aarch64_insn inside GDB to decode instructions, so this patch exposes it and rename it to aarch64_decode_insn to follow the conventions of other interfaces. This patch also change argument insn type from uint32_t to aarch64_insn. include/opcode: 2015-10-02 Yao Qi * aarch64.h (aarch64_decode_insn): Declare it. opcodes: 2015-10-02 Yao Qi * aarch64-dis.c (disas_aarch64_insn): Remove static. Change argument insn type to aarch64_insn. Rename to ... (aarch64_decode_insn): ... it. (print_insn_aarch64_word): Caller updated. --- include/opcode/aarch64.h | 3 +++ opcodes/aarch64-dis.c | 9 +++++---- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index dcf0fef..d0c7489 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -925,6 +925,9 @@ aarch64_stack_pointer_p (const aarch64_opnd_info *); extern int aarch64_zero_register_p (const aarch64_opnd_info *); +extern +int aarch64_decode_insn (aarch64_insn, aarch64_inst *); + /* Given an operand qualifier, return the expected data element size of a qualified operand. */ extern unsigned char diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index e0faeb5..fe3caac 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2029,10 +2029,11 @@ user_friendly_fixup (aarch64_inst *inst) } } -/* Decode INSN and fill in *INST the instruction information. */ +/* Decode INSN and fill in *INST the instruction information. Return zero + on success. */ -static int -disas_aarch64_insn (uint32_t insn, aarch64_inst *inst) +int +aarch64_decode_insn (aarch64_insn insn, aarch64_inst *inst) { const aarch64_opcode *opcode = aarch64_opcode_lookup (insn); @@ -2171,7 +2172,7 @@ print_insn_aarch64_word (bfd_vma pc, addresses, since the addend is not currently pc-relative. */ pc = 0; - ret = disas_aarch64_insn (word, &inst); + ret = aarch64_decode_insn (word, &inst); if (((word >> 21) & 0x3ff) == 1) {