From patchwork Tue Jul 28 09:59:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 7888 Received: (qmail 76872 invoked by alias); 28 Jul 2015 10:00:07 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 76847 invoked by uid 89); 28 Jul 2015 10:00:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f53.google.com Received: from mail-pa0-f53.google.com (HELO mail-pa0-f53.google.com) (209.85.220.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 28 Jul 2015 10:00:04 +0000 Received: by pachj5 with SMTP id hj5so67426357pac.3 for ; Tue, 28 Jul 2015 03:00:02 -0700 (PDT) X-Received: by 10.66.253.72 with SMTP id zy8mr80493415pac.102.1438077602674; Tue, 28 Jul 2015 03:00:02 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by smtp.gmail.com with ESMTPSA id fc3sm34350634pab.16.2015.07.28.03.00.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Jul 2015 03:00:02 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [RFC 1/4] Move ARM register numbers enum to arch/arm.h Date: Tue, 28 Jul 2015 10:59:49 +0100 Message-Id: <1438077592-15356-2-git-send-email-yao.qi@linaro.org> In-Reply-To: <1438077592-15356-1-git-send-email-yao.qi@linaro.org> References: <1438077592-15356-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes This patch moves ARM register numbers enum to arch/arm.h, so that it can used by GDBserver too. This patch is a RFC because it creates a new directory gdb/arch in which arch-specific or target-specific files are placed. gdb: 2015-07-28 Yao Qi * arm-tdep.h (enum gdb_regnum): Move it to ... * arch/arm.h: ... here. New file. * Makefile.in (HFILES_NO_SRCDIR): Add arch/arm.h. --- gdb/Makefile.in | 2 +- gdb/arch/arm.h | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ gdb/arm-tdep.h | 39 +----------------------------------- 3 files changed, 63 insertions(+), 39 deletions(-) create mode 100644 gdb/arch/arm.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index e7fefd9..4080ba4 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -983,7 +983,7 @@ common/common-debug.h common/cleanups.h common/gdb_setjmp.h \ common/common-exceptions.h target/target.h common/symbol.h \ common/common-regcache.h fbsd-tdep.h nat/linux-personality.h \ common/fileio.h nat/x86-linux.h nat/x86-linux-dregs.h \ -nat/linux-namespaces.h +nat/linux-namespaces.h arch/arm.h # Header files that already have srcdir in them, or which are in objdir. diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h new file mode 100644 index 0000000..e0eed60 --- /dev/null +++ b/gdb/arch/arm.h @@ -0,0 +1,61 @@ +/* Common target dependent code for GDB on ARM systems. + Copyright (C) 2002-2015 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARM_H +#define ARM_H + +/* Register numbers of various important registers. */ + +enum gdb_regnum { + ARM_A1_REGNUM = 0, /* first integer-like argument */ + ARM_A4_REGNUM = 3, /* last integer-like argument */ + ARM_AP_REGNUM = 11, + ARM_IP_REGNUM = 12, + ARM_SP_REGNUM = 13, /* Contains address of top of stack */ + ARM_LR_REGNUM = 14, /* address to return to from a function call */ + ARM_PC_REGNUM = 15, /* Contains program counter */ + ARM_F0_REGNUM = 16, /* first floating point register */ + ARM_F3_REGNUM = 19, /* last floating point argument register */ + ARM_F7_REGNUM = 23, /* last floating point register */ + ARM_FPS_REGNUM = 24, /* floating point status register */ + ARM_PS_REGNUM = 25, /* Contains processor status */ + ARM_WR0_REGNUM, /* WMMX data registers. */ + ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15, + ARM_WC0_REGNUM, /* WMMX control registers. */ + ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2, + ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3, + ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7, + ARM_WCGR0_REGNUM, /* WMMX general purpose registers. */ + ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3, + ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7, + ARM_D0_REGNUM, /* VFP double-precision registers. */ + ARM_D31_REGNUM = ARM_D0_REGNUM + 31, + ARM_FPSCR_REGNUM, + + ARM_NUM_REGS, + + /* Other useful registers. */ + ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ + THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ + ARM_NUM_ARG_REGS = 4, + ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, + ARM_NUM_FP_ARG_REGS = 4, + ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM +}; + +#endif diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index f81679a..3e06f79 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -24,44 +24,7 @@ struct gdbarch; struct regset; struct address_space; -/* Register numbers of various important registers. */ - -enum gdb_regnum { - ARM_A1_REGNUM = 0, /* first integer-like argument */ - ARM_A4_REGNUM = 3, /* last integer-like argument */ - ARM_AP_REGNUM = 11, - ARM_IP_REGNUM = 12, - ARM_SP_REGNUM = 13, /* Contains address of top of stack */ - ARM_LR_REGNUM = 14, /* address to return to from a function call */ - ARM_PC_REGNUM = 15, /* Contains program counter */ - ARM_F0_REGNUM = 16, /* first floating point register */ - ARM_F3_REGNUM = 19, /* last floating point argument register */ - ARM_F7_REGNUM = 23, /* last floating point register */ - ARM_FPS_REGNUM = 24, /* floating point status register */ - ARM_PS_REGNUM = 25, /* Contains processor status */ - ARM_WR0_REGNUM, /* WMMX data registers. */ - ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15, - ARM_WC0_REGNUM, /* WMMX control registers. */ - ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2, - ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3, - ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7, - ARM_WCGR0_REGNUM, /* WMMX general purpose registers. */ - ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3, - ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7, - ARM_D0_REGNUM, /* VFP double-precision registers. */ - ARM_D31_REGNUM = ARM_D0_REGNUM + 31, - ARM_FPSCR_REGNUM, - - ARM_NUM_REGS, - - /* Other useful registers. */ - ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ - THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ - ARM_NUM_ARG_REGS = 4, - ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, - ARM_NUM_FP_ARG_REGS = 4, - ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM -}; +#include "arch/arm.h" /* Size of integer registers. */ #define INT_REGISTER_SIZE 4