From patchwork Fri Jun 26 13:42:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Langlois X-Patchwork-Id: 7387 Received: (qmail 124006 invoked by alias); 26 Jun 2015 13:42:25 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 123961 invoked by uid 89); 26 Jun 2015 13:42:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.4 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 26 Jun 2015 13:42:22 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-25-l7u0PBbASEmkYX0411C24A-3 Received: from e105615-lin.cambridge.arm.com ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 26 Jun 2015 14:42:19 +0100 From: Pierre Langlois To: gdb-patches@sourceware.org Cc: Pierre Langlois Subject: [PATCH 1/2] [GDBServer][AArch64] Use the same break instruction as GDB Date: Fri, 26 Jun 2015 14:42:07 +0100 Message-Id: <1435326128-13705-2-git-send-email-pierre.langlois@arm.com> In-Reply-To: <1435326128-13705-1-git-send-email-pierre.langlois@arm.com> References: <1435326128-13705-1-git-send-email-pierre.langlois@arm.com> X-MC-Unique: l7u0PBbASEmkYX0411C24A-3 X-IsSubscribed: yes GDB uses a "brk #0" instruction to perform a software breakpoint while GDBServer uses an illegal instruction. Both instructions should match. When enabling support for the 'Z0' packet, we let GDBServer insert the breakpoint instruction instead of GDB. And in case of permanent breakpoints for example, GDB will check if a breakpoint is inserted in the inferior with `program_breakpoint_here_p (gdbarch, address)', and compare the instruction read from the inferior with the breakpoint instruction. On AArch64, instructions are always little endian so we need to represent it as an array of bytes, as done in aarch64-tdep.c. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c: Remove comment about endianness. (aarch64_breakpoint): Change type to gdb_byte[]. Set to "brk #0". (aarch64_breakpoint_at): Change type of insn to gdb_byte[]. Use memcmp. --- gdb/gdbserver/ChangeLog | 7 +++++++ gdb/gdbserver/linux-aarch64-low.c | 14 ++++++++------ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index 2528f0f..dde7e9e 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,10 @@ +2015-06-26 Pierre Langlois + + * linux-aarch64-low.c: Remove comment about endianness. + (aarch64_breakpoint): Change type to gdb_byte[]. Set to "brk #0". + (aarch64_breakpoint_at): Change type of insn to gdb_byte[]. Use + memcmp. + 2015-06-24 Gary Benson * linux-i386-ipa.c (stdint.h): Do not include. diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c index 043458d..b0a2775 100644 --- a/gdb/gdbserver/linux-aarch64-low.c +++ b/gdb/gdbserver/linux-aarch64-low.c @@ -295,19 +295,21 @@ aarch64_set_pc (struct regcache *regcache, CORE_ADDR pc) supply_register_by_name (regcache, "pc", &newpc); } -/* Correct in either endianness. */ - #define aarch64_breakpoint_len 4 -static const unsigned long aarch64_breakpoint = 0x00800011; +/* AArch64 BRK software debug mode instruction. + This instruction needs to match gdb/aarch64-tdep.c + (aarch64_default_breakpoint). */ +static const gdb_byte aarch64_breakpoint[] = {0x00, 0x00, 0x20, 0xd4}; static int aarch64_breakpoint_at (CORE_ADDR where) { - unsigned long insn; + gdb_byte insn[aarch64_breakpoint_len]; - (*the_target->read_memory) (where, (unsigned char *) &insn, 4); - if (insn == aarch64_breakpoint) + (*the_target->read_memory) (where, (unsigned char *) &insn, + aarch64_breakpoint_len); + if (memcmp (insn, aarch64_breakpoint, aarch64_breakpoint_len) == 0) return 1; return 0;