From patchwork Tue Jun 23 19:01:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 7312 Received: (qmail 9934 invoked by alias); 23 Jun 2015 19:01:57 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 9920 invoked by uid 89); 23 Jun 2015 19:01:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL, BAYES_50, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: smtp.gentoo.org Received: from smtp.gentoo.org (HELO smtp.gentoo.org) (140.211.166.183) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 23 Jun 2015 19:01:52 +0000 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id 823283409FE for ; Tue, 23 Jun 2015 19:01:50 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH] sim: use AS_HELP_STRING everywhere Date: Tue, 23 Jun 2015 15:01:47 -0400 Message-Id: <1435086107-22335-1-git-send-email-vapier@gentoo.org> X-IsSubscribed: yes This helps standardize the configure --help output. Committed. --- sim/ChangeLog | 5 ++++ sim/arm/ChangeLog | 4 +++ sim/arm/configure | 37 +++++++++++++++++---------- sim/avr/ChangeLog | 4 +++ sim/avr/configure | 37 +++++++++++++++++---------- sim/bfin/ChangeLog | 4 +++ sim/bfin/configure | 40 ++++++++++++++++++----------- sim/common/ChangeLog | 27 ++++++++++++++++++++ sim/common/acinclude.m4 | 65 +++++++++++++++++++++++++++++++----------------- sim/common/configure | 20 +++++++++------ sim/configure | 2 +- sim/configure.ac | 2 +- sim/cr16/ChangeLog | 4 +++ sim/cr16/configure | 37 +++++++++++++++++---------- sim/cris/ChangeLog | 4 +++ sim/cris/configure | 42 ++++++++++++++++++++----------- sim/d10v/ChangeLog | 4 +++ sim/d10v/configure | 37 +++++++++++++++++---------- sim/erc32/ChangeLog | 4 +++ sim/erc32/configure | 23 ++++++++++------- sim/frv/ChangeLog | 5 ++++ sim/frv/configure | 44 ++++++++++++++++++++------------ sim/frv/configure.ac | 3 ++- sim/ft32/ChangeLog | 4 +++ sim/ft32/configure | 37 +++++++++++++++++---------- sim/h8300/ChangeLog | 4 +++ sim/h8300/configure | 20 +++++++++------ sim/iq2000/ChangeLog | 4 +++ sim/iq2000/configure | 45 +++++++++++++++++++++------------ sim/lm32/ChangeLog | 4 +++ sim/lm32/configure | 42 ++++++++++++++++++++----------- sim/m32c/ChangeLog | 4 +++ sim/m32c/configure | 20 +++++++++------ sim/m32r/ChangeLog | 4 +++ sim/m32r/configure | 45 +++++++++++++++++++++------------ sim/m68hc11/ChangeLog | 4 +++ sim/m68hc11/configure | 30 ++++++++++++++-------- sim/mcore/ChangeLog | 4 +++ sim/mcore/configure | 37 +++++++++++++++++---------- sim/microblaze/ChangeLog | 4 +++ sim/microblaze/configure | 37 +++++++++++++++++---------- sim/mips/ChangeLog | 4 +++ sim/mips/configure | 45 +++++++++++++++++++++------------ sim/mn10300/ChangeLog | 4 +++ sim/mn10300/configure | 39 ++++++++++++++++++----------- sim/moxie/ChangeLog | 4 +++ sim/moxie/configure | 37 +++++++++++++++++---------- sim/msp430/ChangeLog | 4 +++ sim/msp430/configure | 30 ++++++++++++++-------- sim/rl78/ChangeLog | 4 +++ sim/rl78/configure | 20 +++++++++------ sim/rx/ChangeLog | 6 +++++ sim/rx/configure | 23 ++++++++++------- sim/rx/configure.ac | 6 +++-- sim/sh/ChangeLog | 4 +++ sim/sh/configure | 37 +++++++++++++++++---------- sim/sh64/ChangeLog | 4 +++ sim/sh64/configure | 45 +++++++++++++++++++++------------ sim/v850/ChangeLog | 4 +++ sim/v850/configure | 36 +++++++++++++++++---------- 60 files changed, 791 insertions(+), 368 deletions(-) diff --git a/sim/v850/configure b/sim/v850/configure index 72f6c3f..46d9ffe 100755 diff --git a/sim/ChangeLog b/sim/ChangeLog index f3ad5ec..d237972 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,8 @@ +2015-06-23 Mike Frysinger + + * configure.ac (AC_ARG_ENABLE(sim)): Call AS_HELP_STRING. + * configure: Regenerate. + 2015-06-12 Mike Frysinger * README-HACKING: Change configure.in to configure.ac. diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 22b74db..1f6db4e 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,9 @@ 2015-06-23 Mike Frysinger + * configure: Regenerate. + +2015-06-23 Mike Frysinger + * armdefs.h: Always include stdint.h. [!__STDC__]: Delete. [!HAVE_STDINT_H]: Delete. diff --git a/sim/arm/configure b/sim/arm/configure index d608a7f..215f0c4 100755 diff --git a/sim/avr/ChangeLog b/sim/avr/ChangeLog index ea224f9..0c2963c 100644 --- a/sim/avr/ChangeLog +++ b/sim/avr/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/avr/configure b/sim/avr/configure index 860ee4e..b9530e2 100755 diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index d9d8403..300b081 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * interp.c: Include sim-syscall.h. diff --git a/sim/bfin/configure b/sim/bfin/configure index 7eb164f..76cbc6a 100755 diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index c0ddbca..1a67e5d 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,5 +1,32 @@ 2015-06-23 Mike Frysinger + * acinclude.m4 (AC_ARG_ENABLE(sim-bswap)): Call AS_HELP_STRING. + (AC_ARG_ENABLE(sim-cflags)): Likewise. + (AC_ARG_ENABLE(sim-debug)): Likewise. + (AC_ARG_ENABLE(sim-stdio)): Likewise. + (AC_ARG_ENABLE(sim-trace)): Likewise. + (AC_ARG_ENABLE(sim-profile)): Likewise. + (AC_ARG_ENABLE(sim-environment)): Likewise. + (AC_ARG_ENABLE(sim-alignment)): Likewise. + (AC_ARG_ENABLE(sim-assert)): Likewise. + (AC_ARG_ENABLE(sim-bitsize)): Likewise. + (AC_ARG_ENABLE(sim-endian)): Likewise. + (AC_ARG_ENABLE(sim-hostendian)): Likewise. + (AC_ARG_ENABLE(sim-float)): Likewise. + (AC_ARG_ENABLE(sim-scache)): Likewise. + (AC_ARG_ENABLE(sim-default-model)): Likewise. + (AC_ARG_ENABLE(sim-inline)): Likewise. + (AC_ARG_ENABLE(sim-packages)): Likewise. + (AC_ARG_ENABLE(sim-regparm)): Likewise. + (AC_ARG_ENABLE(sim-reserved-bits)): Likewise. + (AC_ARG_ENABLE(sim-smp)): Likewise. + (AC_ARG_ENABLE(sim-stdcall)): Likewise. + (AC_ARG_ENABLE(sim-xor-endian)): Likewise. + (AC_ARG_ENABLE(cgen-maint)): Likewise. + * configure: Regenerate. + +2015-06-23 Mike Frysinger + * sim-config.h (WITH_TRACE): Define to ~TRACE_debug. 2015-06-23 Mike Frysinger diff --git a/sim/common/acinclude.m4 b/sim/common/acinclude.m4 index bed2366..672227e 100644 --- a/sim/common/acinclude.m4 +++ b/sim/common/acinclude.m4 @@ -122,7 +122,7 @@ AM_MAINTAINER_MODE dnl This is a generic option to enable special byte swapping dnl insns on *any* cpu. AC_ARG_ENABLE(sim-bswap, -[ --enable-sim-bswap Use Host specific BSWAP instruction.], +[AS_HELP_STRING([--enable-sim-bswap], [Use Host specific BSWAP instruction])], [case "${enableval}" in yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";; no) sim_bswap="-DWITH_BSWAP=0";; @@ -135,7 +135,8 @@ AC_SUBST(sim_bswap) AC_ARG_ENABLE(sim-cflags, -[ --enable-sim-cflags=opts Extra CFLAGS for use in building simulator], +[AS_HELP_STRING([--enable-sim-cflags=opts], + [Extra CFLAGS for use in building simulator])], [case "${enableval}" in yes) sim_cflags="-O2 -fomit-frame-pointer";; trace) AC_MSG_ERROR("Please use --enable-sim-debug instead."); sim_cflags="";; @@ -151,7 +152,8 @@ AC_SUBST(sim_cflags) dnl --enable-sim-debug is for developers of the simulator dnl the allowable values are work-in-progress AC_ARG_ENABLE(sim-debug, -[ --enable-sim-debug=opts Enable debugging flags], +[AS_HELP_STRING([--enable-sim-debug=opts], + [Enable debugging flags (for developers of the sim itself)])], [case "${enableval}" in yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";; no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";; @@ -166,7 +168,8 @@ AC_SUBST(sim_debug) dnl --enable-sim-stdio is for users of the simulator dnl It determines if IO from the program is routed through STDIO (buffered) AC_ARG_ENABLE(sim-stdio, -[ --enable-sim-stdio Specify whether to use stdio for console input/output.], +[AS_HELP_STRING([--enable-sim-stdio], + [Specify whether to use stdio for console input/output])], [case "${enableval}" in yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";; no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";; @@ -184,7 +187,8 @@ dnl up to the simulator], or is a comma separated list of names of tracing dnl elements to enable. The latter is only supported on simulators that dnl use WITH_TRACE. AC_ARG_ENABLE(sim-trace, -[ --enable-sim-trace=opts Enable tracing flags], +[AS_HELP_STRING([--enable-sim-trace=opts], + [Enable tracing of simulated programs])], [case "${enableval}" in yes) sim_trace="-DWITH_TRACE=-1";; no) sim_trace="-DWITH_TRACE=0";; @@ -213,7 +217,7 @@ dnl up to the simulator], or is a comma separated list of names of profiling dnl elements to enable. The latter is only supported on simulators that dnl use WITH_PROFILE. AC_ARG_ENABLE(sim-profile, -[ --enable-sim-profile=opts Enable profiling flags], +[AS_HELP_STRING([--enable-sim-profile=opts], [Enable profiling flags])], [case "${enableval}" in yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";; no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";; @@ -277,7 +281,8 @@ dnl let's not. AC_DEFUN([SIM_AC_OPTION_ENVIRONMENT], [ AC_ARG_ENABLE(sim-environment, -[ --enable-sim-environment=environment Specify mixed, user, virtual or operating environment.], +[AS_HELP_STRING([--enable-sim-environment=environment], + [Specify mixed, user, virtual or operating environment])], [case "${enableval}" in all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";; user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";; @@ -303,7 +308,8 @@ wire_alignment="[$1]" default_alignment="[$2]" [ AC_ARG_ENABLE(sim-alignment, -[ --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses.], +[AS_HELP_STRING([--enable-sim-alignment=align], + [Specify strict, nonstrict or forced alignment of memory accesses])], [case "${enableval}" in strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";; nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";; @@ -350,7 +356,8 @@ dnl Conditionally compile in assertion statements. AC_DEFUN([SIM_AC_OPTION_ASSERT], [ AC_ARG_ENABLE(sim-assert, -[ --enable-sim-assert Specify whether to perform random assertions.], +[AS_HELP_STRING([--enable-sim-assert], + [Specify whether to perform random assertions])], [case "${enableval}" in yes) sim_assert="-DWITH_ASSERT=1";; no) sim_assert="-DWITH_ASSERT=0";; @@ -377,7 +384,7 @@ wire_word_msb="[$2]" wire_address_bitsize="[$3]" wire_cell_bitsize="[$4]" [AC_ARG_ENABLE(sim-bitsize, -[ --enable-sim-bitsize=N Specify target bitsize (32 or 64).], +[AS_HELP_STRING([--enable-sim-bitsize=N], [Specify target bitsize (32 or 64)])], [sim_bitsize= case "${enableval}" in 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";; @@ -442,7 +449,8 @@ AC_DEFUN([SIM_AC_OPTION_ENDIAN], wire_endian="[$1]" default_endian="[$2]" AC_ARG_ENABLE(sim-endian, -[ --enable-sim-endian=endian Specify target byte endian orientation.], +[AS_HELP_STRING([--enable-sim-endian=endian], + [Specify target byte endian orientation])], [case "${enableval}" in b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";; l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";; @@ -490,7 +498,8 @@ dnl (for instance in a canadian cross) AC_DEFUN([SIM_AC_OPTION_HOSTENDIAN], [ AC_ARG_ENABLE(sim-hostendian, -[ --enable-sim-hostendian=end Specify host byte endian orientation.], +[AS_HELP_STRING([--enable-sim-hostendian=end], + [Specify host byte endian orientation])], [case "${enableval}" in no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";; b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";; @@ -524,7 +533,8 @@ AC_DEFUN([SIM_AC_OPTION_FLOAT], default_sim_float="[$1]" default_sim_float_bitsize="[$2]" AC_ARG_ENABLE(sim-float, -[ --enable-sim-float Specify that the target processor has floating point hardware.], +[AS_HELP_STRING([--enable-sim-float], + [Specify that the target processor has floating point hardware])], [case "${enableval}" in yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";; no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";; @@ -552,7 +562,8 @@ AC_DEFUN([SIM_AC_OPTION_SCACHE], [ default_sim_scache="ifelse([$1],,0,[$1])" AC_ARG_ENABLE(sim-scache, -[ --enable-sim-scache=size Specify simulator execution cache size.], +[AS_HELP_STRING([--enable-sim-scache=size], + [Specify simulator execution cache size])], [case "${enableval}" in yes) sim_scache="-DWITH_SCACHE=${default_sim_scache}";; no) sim_scache="-DWITH_SCACHE=0" ;; @@ -572,7 +583,8 @@ AC_DEFUN([SIM_AC_OPTION_DEFAULT_MODEL], [ default_sim_default_model="ifelse([$1],,0,[$1])" AC_ARG_ENABLE(sim-default-model, -[ --enable-sim-default-model=model Specify default model to simulate.], +[AS_HELP_STRING([--enable-sim-default-model=model], + [Specify default model to simulate])], [case "${enableval}" in yes|no) AC_MSG_ERROR("Missing argument to --enable-sim-default-model");; *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";; @@ -660,7 +672,8 @@ AC_DEFUN([SIM_AC_OPTION_INLINE], [ default_sim_inline="ifelse([$1],,,-DDEFAULT_INLINE=[$1])" AC_ARG_ENABLE(sim-inline, -[ --enable-sim-inline=inlines Specify which functions should be inlined.], +[AS_HELP_STRING([--enable-sim-inline=inlines], + [Specify which functions should be inlined])], [sim_inline="" case "$enableval" in no) sim_inline="-DDEFAULT_INLINE=0";; @@ -704,7 +717,8 @@ AC_SUBST(sim_inline) AC_DEFUN([SIM_AC_OPTION_PACKAGES], [ AC_ARG_ENABLE(sim-packages, -[ --enable-sim-packages=list Specify the packages to be included in the build.], +[AS_HELP_STRING([--enable-sim-packages=list], + [Specify the packages to be included in the build])], [packages=disklabel case "${enableval}" in yes) ;; @@ -730,7 +744,8 @@ AC_SUBST(sim_packages) AC_DEFUN([SIM_AC_OPTION_REGPARM], [ AC_ARG_ENABLE(sim-regparm, -[ --enable-sim-regparm=nr-parm Pass parameters in registers instead of on the stack - x86/GCC specific.], +[AS_HELP_STRING([--enable-sim-regparm=nr-parm], + [Pass parameters in registers instead of on the stack - x86/GCC specific])], [case "${enableval}" in 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) sim_regparm="-DWITH_REGPARM=${enableval}";; no) sim_regparm="" ;; @@ -748,7 +763,8 @@ AC_DEFUN([SIM_AC_OPTION_RESERVED_BITS], [ default_sim_reserved_bits="ifelse([$1],,1,[$1])" AC_ARG_ENABLE(sim-reserved-bits, -[ --enable-sim-reserved-bits Specify whether to check reserved bits in instruction.], +[AS_HELP_STRING([--enable-sim-reserved-bits], + [Specify whether to check reserved bits in instruction])], [case "${enableval}" in yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";; no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";; @@ -765,7 +781,8 @@ AC_DEFUN([SIM_AC_OPTION_SMP], [ default_sim_smp="ifelse([$1],,5,[$1])" AC_ARG_ENABLE(sim-smp, -[ --enable-sim-smp=n Specify number of processors to configure for (default ${default_sim_smp}).], +[AS_HELP_STRING([--enable-sim-smp=n], + [Specify number of processors to configure for (default ${default_sim_smp})])], [case "${enableval}" in yes) sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5";; no) sim_smp="-DWITH_SMP=0" ; sim_igen_smp="-N 0";; @@ -784,7 +801,8 @@ AC_SUBST(sim_smp) AC_DEFUN([SIM_AC_OPTION_STDCALL], [ AC_ARG_ENABLE(sim-stdcall, -[ --enable-sim-stdcall=type Use an alternative function call/return mechanism - x86/GCC specific.], +[AS_HELP_STRING([--enable-sim-stdcall=type], + [Use an alternative function call/return mechanism - x86/GCC specific])], [case "${enableval}" in no) sim_stdcall="" ;; std*) sim_stdcall="-DWITH_STDCALL=1";; @@ -802,7 +820,8 @@ AC_DEFUN([SIM_AC_OPTION_XOR_ENDIAN], [ default_sim_xor_endian="ifelse([$1],,8,[$1])" AC_ARG_ENABLE(sim-xor-endian, -[ --enable-sim-xor-endian=n Specify number bytes involved in XOR bi-endian mode (default ${default_sim_xor_endian}).], +[AS_HELP_STRING([--enable-sim-xor-endian=n], + [Specify number bytes involved in XOR bi-endian mode (default ${default_sim_xor_endian})])], [case "${enableval}" in yes) sim_xor_endian="-DWITH_XOR_ENDIAN=8";; no) sim_xor_endian="-DWITH_XOR_ENDIAN=0";; @@ -953,7 +972,7 @@ dnl a directory name, but what we're doing here is an enable/disable kind dnl of thing and specifying both --enable and --with is klunky. dnl If you reeely want this to be --with, go ahead and change it. AC_ARG_ENABLE(cgen-maint, -[ --enable-cgen-maint[=DIR] build cgen generated files], +[AS_HELP_STRING([--enable-cgen-maint[=DIR]], [build cgen generated files])], [case "${enableval}" in yes) cgen_maint=yes ;; no) cgen_maint=no ;; diff --git a/sim/common/configure b/sim/common/configure index 96edf37..7f1ef52 100755 diff --git a/sim/configure b/sim/configure index bf0a094..a90d352 100755 diff --git a/sim/configure.ac b/sim/configure.ac index f1734e3..39f9c6e 100644 --- a/sim/configure.ac +++ b/sim/configure.ac @@ -30,7 +30,7 @@ AC_SUBST(CFLAGS_FOR_BUILD) # If a cpu ever has more than one simulator to choose from, use # --enable-sim=... to choose. AC_ARG_ENABLE(sim, -[ --enable-sim ], +[AS_HELP_STRING([--enable-sim], [Enable the GNU simulator])], [case "${enableval}" in yes | no) ;; *) AC_MSG_ERROR(bad value ${enableval} given for --enable-sim option) ;; diff --git a/sim/cr16/ChangeLog b/sim/cr16/ChangeLog index 7647d1c..68de3bf 100644 --- a/sim/cr16/ChangeLog +++ b/sim/cr16/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/cr16/configure b/sim/cr16/configure index d608a7f..215f0c4 100755 diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog index c4b94ec..ad3f186 100644 --- a/sim/cris/ChangeLog +++ b/sim/cris/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * traps.c: Include sim-syscall.h. diff --git a/sim/cris/configure b/sim/cris/configure index 8dfc3da..a40197f 100755 diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 74cda7a..273dc8f 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/d10v/configure b/sim/d10v/configure index d608a7f..215f0c4 100755 diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index 9dfc625..ee0c818 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/erc32/configure b/sim/erc32/configure index 17d2e6b..cf91fa9 100755 diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index a0eaa36..4891957 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,3 +1,8 @@ +2015-06-23 Mike Frysinger + + * configure.ac (AC_ARG_ENABLE(sim-trapdump)): Call AS_HELP_STRING. + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/frv/configure b/sim/frv/configure index a3529af..0cc04c1 100755 diff --git a/sim/frv/configure.ac b/sim/frv/configure.ac index c56fbe7..ebaf6ab 100644 --- a/sim/frv/configure.ac +++ b/sim/frv/configure.ac @@ -17,7 +17,8 @@ SIM_AC_OPTION_CGEN_MAINT # Enable making unknown traps dump out registers # AC_ARG_ENABLE(sim-trapdump, -[ --enable-sim-trapdump Make unknown traps dump the registers], +[AS_HELP_STRING([--enable-sim-trapdump], + [Make unknown traps dump the registers])], [case "${enableval}" in yes) sim_trapdump="-DTRAPDUMP=1";; no) sim_trapdump="-DTRAPDUMP=0";; diff --git a/sim/ft32/ChangeLog b/sim/ft32/ChangeLog index 819e1de..988413f 100644 --- a/sim/ft32/ChangeLog +++ b/sim/ft32/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/ft32/configure b/sim/ft32/configure index d3a8cfc..753c3ac 100755 diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index ad36c75..f9315cd 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/h8300/configure b/sim/h8300/configure index f8c3da5..0c558e8 100755 diff --git a/sim/iq2000/ChangeLog b/sim/iq2000/ChangeLog index da78da2..bec6d21 100644 --- a/sim/iq2000/ChangeLog +++ b/sim/iq2000/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/iq2000/configure b/sim/iq2000/configure index ab80a9a..d2c9629 100755 diff --git a/sim/lm32/ChangeLog b/sim/lm32/ChangeLog index 7442ba3..edc530a 100644 --- a/sim/lm32/ChangeLog +++ b/sim/lm32/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * traps.c (lm32bf_scall_insn): Replace call to cb_syscall with diff --git a/sim/lm32/configure b/sim/lm32/configure index 9474000..e5643be 100755 diff --git a/sim/m32c/ChangeLog b/sim/m32c/ChangeLog index 19850c3..e782138 100644 --- a/sim/m32c/ChangeLog +++ b/sim/m32c/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/m32c/configure b/sim/m32c/configure index 65e8b21..f51664b 100755 diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 43aa13d..347ddc0 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * traps.c (m32r_trap): Replace call to cb_syscall with diff --git a/sim/m32r/configure b/sim/m32r/configure index 35dd792..00d3316 100755 diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog index 5c933c1..2c5cf17 100644 --- a/sim/m68hc11/ChangeLog +++ b/sim/m68hc11/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/m68hc11/configure b/sim/m68hc11/configure index 38a815e..5d7749d 100755 diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog index bc1598a..d396ab4 100644 --- a/sim/mcore/ChangeLog +++ b/sim/mcore/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * interp.c (handle_trap1): Replace call to cb_syscall with diff --git a/sim/mcore/configure b/sim/mcore/configure index d608a7f..215f0c4 100755 diff --git a/sim/microblaze/ChangeLog b/sim/microblaze/ChangeLog index c4716a5..765480c 100644 --- a/sim/microblaze/ChangeLog +++ b/sim/microblaze/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/microblaze/configure b/sim/microblaze/configure index d608a7f..215f0c4 100755 diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index a8ea4b5..d9c86a7 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure.ac: Change configure.in to configure.ac. diff --git a/sim/mips/configure b/sim/mips/configure index 9ea9ea5..f073b2b 100755 diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index ce1d326..4758f69 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * op_utils.c (do_syscall): Replace call to cb_syscall with diff --git a/sim/mn10300/configure b/sim/mn10300/configure index 3cddf22..703063f 100755 diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog index 3c887de..c6fecba 100644 --- a/sim/moxie/ChangeLog +++ b/sim/moxie/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/moxie/configure b/sim/moxie/configure index f9fd726..53bc48b 100755 diff --git a/sim/msp430/ChangeLog b/sim/msp430/ChangeLog index 146796c..fa59f27 100644 --- a/sim/msp430/ChangeLog +++ b/sim/msp430/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-17 Mike Frysinger * msp430-sim.c (maybe_perform_syscall): Replace call to cb_syscall diff --git a/sim/msp430/configure b/sim/msp430/configure index 7d342c9..b5d166c 100755 diff --git a/sim/rl78/ChangeLog b/sim/rl78/ChangeLog index 0bf880e..45481c1 100644 --- a/sim/rl78/ChangeLog +++ b/sim/rl78/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/rl78/configure b/sim/rl78/configure index d6d20fe..433cad3 100755 diff --git a/sim/rx/ChangeLog b/sim/rx/ChangeLog index 507046f..b0be474 100644 --- a/sim/rx/ChangeLog +++ b/sim/rx/ChangeLog @@ -1,3 +1,9 @@ +2015-06-23 Mike Frysinger + + * configure.ac (AC_ARG_ENABLE(cycle-accurate)): Call AS_HELP_STRING. + (AC_ARG_ENABLE(cycle-stats)): Likewise. + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/rx/configure b/sim/rx/configure index 4dcbbfd..e36b80d 100755 diff --git a/sim/rx/configure.ac b/sim/rx/configure.ac index 24e14e7..94b5a74 100644 --- a/sim/rx/configure.ac +++ b/sim/rx/configure.ac @@ -27,14 +27,16 @@ SIM_AC_COMMON AC_CHECK_HEADERS(getopt.h) AC_ARG_ENABLE(cycle-accurate, -[ --disable-cycle-accurate ], +[AS_HELP_STRING([--disable-cycle-accurate], + [Disable cycle accurate simulation (faster runtime)])], [case "${enableval}" in yes | no) ;; *) AC_MSG_ERROR(bad value ${enableval} given for --enable-cycle-accurate option) ;; esac]) AC_ARG_ENABLE(cycle-stats, -[ --disable-cycle-stats ], +[AS_HELP_STRING([--disable-cycle-stats], + [Disable cycle statistics (faster runtime)])], [case "${enableval}" in yes | no) ;; *) AC_MSG_ERROR(bad value ${enableval} given for --enable-cycle-stats option) ;; diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index 5eae156..09d4520 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/sh/configure b/sim/sh/configure index d608a7f..215f0c4 100755 diff --git a/sim/sh64/ChangeLog b/sim/sh64/ChangeLog index b780235..14c394c 100644 --- a/sim/sh64/ChangeLog +++ b/sim/sh64/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate. diff --git a/sim/sh64/configure b/sim/sh64/configure index 0344167..2a3e660 100755 diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index a69992a..92f4dcd 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,3 +1,7 @@ +2015-06-23 Mike Frysinger + + * configure: Regenerate. + 2015-06-12 Mike Frysinger * configure: Regenerate.