[v2,02/22] sim/erc32: Corrected wrong CPU implementation and version ID in psr

Message ID 1424385100-15397-3-git-send-email-jiri@gaisler.se
State Committed
Headers

Commit Message

Jiri Gaisler Feb. 19, 2015, 10:31 p.m. UTC
  * exec.c (init_regs) erc32 has vendor ID 1 and version ID 1 in %psr
---
 sim/erc32/exec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Mike Frysinger Feb. 22, 2015, 4:15 a.m. UTC | #1
On 19 Feb 2015 23:31, Jiri Gaisler wrote:
> 	* exec.c (init_regs) erc32 has vendor ID 1 and version ID 1 in %psr

needs a colon at the start, and a period at the end:
	* exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr.

merged with that fix
-mike
  

Patch

diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
index dc86ba3..07f3586 100644
--- a/sim/erc32/exec.c
+++ b/sim/erc32/exec.c
@@ -2011,7 +2011,7 @@  init_regs(sregs)
     sregs->npc = 4;
     sregs->trap = 0;
     sregs->psr &= 0x00f03fdf;
-    sregs->psr |= 0x080;	/* Set supervisor bit */
+    sregs->psr |= 0x11000080;	/* Set supervisor bit */
     sregs->breakpoint = 0;
     sregs->annul = 0;
     sregs->fpstate = FP_EXE_MODE;