From patchwork Mon Oct 27 03:10:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 3385 Received: (qmail 5326 invoked by alias); 27 Oct 2014 03:10:47 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 5293 invoked by uid 89); 27 Oct 2014 03:10:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f181.google.com Received: from mail-pd0-f181.google.com (HELO mail-pd0-f181.google.com) (209.85.192.181) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 27 Oct 2014 03:10:44 +0000 Received: by mail-pd0-f181.google.com with SMTP id y10so421650pdj.26 for ; Sun, 26 Oct 2014 20:10:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=z0dW5OHmzykQcajEaQx+j0HHhTzTqbYzbJUACnYch28=; b=G9m4M+uD3UPOw+sS21OcN3i+NVJydkGf+ybqe98twB6J+vtNC843vXiFVrT63R0AkR nL8GVRxt8HlO29KHKrWu2waUS8riQvOAQ1QS2/kFJfGEiBdokBy5tOllatfznBxbdL6Y UypUaOn7CLsyJGimQ8yfwIQrPTR9Sv+zUfRvm80Rs3RveBfjb8WX5xPJ6O7CDkYxhf56 DDD7YuFaYcSUrWgaWwbF+KAZchZiOuIFoqQtO9WvNx6W6mOR7DU2jJrP0NQ+92WtKaLr aI8FBRBNPFU0ocnuJ2tC1wpn+XwITyZ0Ih2D8aq8ADNIpcbovK+FH8Na0OPWhLw+R6XM wcFQ== X-Gm-Message-State: ALoCoQnZUN/SyMURnnLlyFCx3vT4sRLAq2wX+9u+TqKpKUHTFfaiopahWZkv0ZpkrK/S6zCW8MWM X-Received: by 10.66.118.201 with SMTP id ko9mr16916278pab.46.1414379443225; Sun, 26 Oct 2014 20:10:43 -0700 (PDT) Received: from kamensky-w530.cisco.com (128-107-239-233.cisco.com. [128.107.239.233]) by mx.google.com with ESMTPSA id sb2sm9410723pbc.24.2014.10.26.20.10.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 26 Oct 2014 20:10:42 -0700 (PDT) From: Victor Kamensky To: gdb-patches@sourceware.org, Yao Qi Cc: Andrew Pinski , victor.kamensky@linaro.org Subject: [PATCH V4 1/3] ARM: extract_arm_insn function need to read instrs correctly in be8 case Date: Sun, 26 Oct 2014 20:10:32 -0700 Message-Id: <1414379434-5217-2-git-send-email-victor.kamensky@linaro.org> In-Reply-To: <1414379434-5217-1-git-send-email-victor.kamensky@linaro.org> References: <1414379434-5217-1-git-send-email-victor.kamensky@linaro.org> extract_arm_insn function needs to read instructions in gdbarch_byte_order_for_code byte order, because in case armv7b, even data is big endian, instructions are still little endian. Currently function uses gdbarch_byte_order which would be big endian in armv7b case. Because of this issue pretty much all gdb.reverse/ tests are failing with 'Process record does not support instruction' message. Fix is to change gdbarch_byte_order to gdbarch_byte_order_for_code, when passed to extract_unsigned_integer that reads instruction. gdb/ChangeLog: 2014-10-21 Victor Kamensky * arm-tdep.c (extract_arm_insn): Use gdbarch_byte_order_for_code to read arm instruction. --- gdb/arm-tdep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index e2559ec..e7a1ec5 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -13860,7 +13860,7 @@ extract_arm_insn (insn_decode_record *insn_record, uint32_t insn_size) return 1; insn_record->arm_insn = (uint32_t) extract_unsigned_integer (&buf[0], insn_size, - gdbarch_byte_order (insn_record->gdbarch)); + gdbarch_byte_order_for_code (insn_record->gdbarch)); return 0; }