From patchwork Tue Oct 21 00:56:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 3301 Received: (qmail 12427 invoked by alias); 21 Oct 2014 00:57:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 12177 invoked by uid 89); 21 Oct 2014 00:57:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f171.google.com Received: from mail-pd0-f171.google.com (HELO mail-pd0-f171.google.com) (209.85.192.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 21 Oct 2014 00:57:27 +0000 Received: by mail-pd0-f171.google.com with SMTP id ft15so195221pdb.16 for ; Mon, 20 Oct 2014 17:57:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=75Nf82GKnua9fWCGd6zXCyRlwWYZ4rBpiwnL5HN6MK0=; b=JHha5Yd0mgDd1qAxpoXh54BNW32A1Sjuwp4++RrzsGhxFFrgl9XXvD+oQMqYc2VE4r W64YtE3QdzNiTND1lcHrPZNLOgPsPkmo4dBYvWGDFfUqZq/a+yEGposcTAeCGN4iGn+M hFSqrbmpz6ZkfUBfzpEGfRZ2be/gFDk+bg+GicT9QHvfUOfJEMIxjyJVcQJKwVH8fuuN atmiAshYpEM6dTOODxxXyVx4+6qltKA98NIZIJ245h4DyUqe/JNLDDJqx6QN12J8jzQp Jfix5qI8YxoVNUrLNpElCQ0cNtR5UEzmqTKNlVlicFlPZrjmEQXZIhFzvfyrVVGe6qKO UWrg== X-Gm-Message-State: ALoCoQmwnEdhlUBMQ4/dB/JD93jXvL1Kzsa4m7gDMBxzABnpgVPsu8GPj0xd8SfCtgByACuuoUkb X-Received: by 10.68.233.166 with SMTP id tx6mr1118573pbc.89.1413853045777; Mon, 20 Oct 2014 17:57:25 -0700 (PDT) Received: from kamensky-w530.cisco.com.net ([24.6.79.41]) by mx.google.com with ESMTPSA id g15sm10230692pdm.68.2014.10.20.17.57.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Oct 2014 17:57:25 -0700 (PDT) From: Victor Kamensky To: gdb-patches@sourceware.org Cc: victor.kamensky@linaro.org Subject: [PATCH 2/5] ARM: extract_arm_insn function need to read instrs correctly in be8 case Date: Mon, 20 Oct 2014 17:56:58 -0700 Message-Id: <1413853021-4393-3-git-send-email-victor.kamensky@linaro.org> In-Reply-To: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> References: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> extract_arm_insn function needs to read instructions in gdbarch_byte_order_for_code byte order, because in case armv7b, even data is big endian, instructions are still little endian. Currently function uses gdbarch_byte_order which would be big endian in armv7b case. Because of this issue pretty much all gdb.reverse/ tests are failing with 'Process record does not support instruction' message. Fix is to change gdbarch_byte_order to gdbarch_byte_order_for_code, when passed to extract_unsigned_integer that reads instruction. --- gdb/ChangeLog | 5 +++++ gdb/arm-tdep.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index c967a93..2aef5dc 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2014-10-13 Victor Kamensky + + * arm-tdep.c (extract_arm_insn): use dbarch_byte_order_for_code + to read arm instruction. + 2014-09-30 Don Breazeal * inf-ptrace.c (inf_ptrace_follow_fork): Remove target-independent diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index e2559ec..e7a1ec5 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -13860,7 +13860,7 @@ extract_arm_insn (insn_decode_record *insn_record, uint32_t insn_size) return 1; insn_record->arm_insn = (uint32_t) extract_unsigned_integer (&buf[0], insn_size, - gdbarch_byte_order (insn_record->gdbarch)); + gdbarch_byte_order_for_code (insn_record->gdbarch)); return 0; }