From patchwork Tue Aug 12 09:19:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Udma X-Patchwork-Id: 2370 Received: (qmail 21991 invoked by alias); 12 Aug 2014 09:23:41 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 21971 invoked by uid 89); 12 Aug 2014 09:23:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL, BAYES_20, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 X-HELO: na01-bl2-obe.outbound.protection.outlook.com Received: from mail-bl2lp0203.outbound.protection.outlook.com (HELO na01-bl2-obe.outbound.protection.outlook.com) (207.46.163.203) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 12 Aug 2014 09:23:37 +0000 Received: from BN3PR0301CA0078.namprd03.prod.outlook.com (25.160.152.174) by BL2PR03MB164.namprd03.prod.outlook.com (10.255.230.148) with Microsoft SMTP Server (TLS) id 15.0.1005.10; Tue, 12 Aug 2014 09:23:24 +0000 Received: from BY2FFO11FD012.protection.gbl (2a01:111:f400:7c0c::159) by BN3PR0301CA0078.outlook.office365.com (2a01:111:e400:401e::46) with Microsoft SMTP Server (TLS) id 15.0.1005.10 via Frontend Transport; Tue, 12 Aug 2014 09:23:25 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD012.mail.protection.outlook.com (10.1.14.130) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Tue, 12 Aug 2014 09:23:24 +0000 Received: from udp122517uds.ea.freescale.net (udp122517uds.ea.freescale.net [10.171.74.8]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s7C9NMT2001740; Tue, 12 Aug 2014 02:23:23 -0700 From: Catalin Udma To: CC: Catalin Udma Subject: [PATCH] aarch64/gdbserver: fix floating point registers display Date: Tue, 12 Aug 2014 12:19:26 +0300 Message-ID: <1407835166-827-1-git-send-email-catalin.udma@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(377424004)(189002)(199003)(102836001)(21056001)(48376002)(50466002)(87936001)(26826002)(84676001)(64706001)(76482001)(79102001)(87286001)(36756003)(4396001)(104166001)(47776003)(20776003)(85852003)(83322001)(77156001)(46102001)(89996001)(88136002)(83072002)(69596002)(97736001)(95666004)(68736004)(19580405001)(62966002)(92726001)(99396002)(92566001)(31966008)(81542001)(33646002)(74662001)(74502001)(2351001)(107046002)(50986999)(105606002)(106466001)(229853001)(104016003)(81156004)(86362001)(85306004)(77982001)(6806004)(44976005)(50226001)(19580395003)(110136001)(93916002)(81342001)(80022001); DIR:OUT; SFP:; SCL:1; SRVR:BL2PR03MB164; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 0301360BF5 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=catalin.udma@freescale.com; X-OriginatorOrg: freescale.com When using aarch64 gdb with gdbserver, floating point registers are not correctly displayed, as below: (gdb) info registers fpsr fpcr fpsr fpcr Also, the offset for floating point v0-v31 registers in gdbserver is wrong because it is computed based on 32-bit size of CPSR register as defined in the regformat/aarch64.dat file To fix these problems, the missing fpsr and fpcr registers are added when floating point registers are read/write and the aarch64.dat file is updated to use the correct CPSR size of 64-bits accordingly to the definition in aarch64-core.xml gdb/ 2014-08-12 Catalin Udma * regformats/aarch64.dat (cpsr): Change to be 64bit. gdb/gdbserver/ 2014-08-12 Catalin Udma * linux-aarch64-low.c (AARCH64_FPSR_REGNO): New define. (AARCH64_FPCR_REGNO): Likewise. (AARCH64_NUM_REGS): Update to include fpsr/fpcr registers. (aarch64_fill_fpregset): Add missing fpsp/fpcr registers. (aarch64_store_fpregset): Likewise. --- gdb/gdbserver/linux-aarch64-low.c | 8 +++++++- gdb/regformats/aarch64.dat | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c index 6066e15..3453b2e 100644 --- a/gdb/gdbserver/linux-aarch64-low.c +++ b/gdb/gdbserver/linux-aarch64-low.c @@ -46,8 +46,10 @@ extern const struct target_desc *tdesc_aarch64; #define AARCH64_PC_REGNO 32 #define AARCH64_CPSR_REGNO 33 #define AARCH64_V0_REGNO 34 +#define AARCH64_FPSR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM) +#define AARCH64_FPCR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 1) -#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM) +#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 2) static int aarch64_regmap [] = @@ -255,6 +257,8 @@ aarch64_fill_fpregset (struct regcache *regcache, void *buf) for (i = 0; i < AARCH64_V_REGS_NUM; i++) collect_register (regcache, AARCH64_V0_REGNO + i, ®set->vregs[i]); + collect_register (regcache, AARCH64_FPSR_REGNO, ®set->fpsr); + collect_register (regcache, AARCH64_FPCR_REGNO, ®set->fpcr); } static void @@ -265,6 +269,8 @@ aarch64_store_fpregset (struct regcache *regcache, const void *buf) for (i = 0; i < AARCH64_V_REGS_NUM; i++) supply_register (regcache, AARCH64_V0_REGNO + i, ®set->vregs[i]); + supply_register (regcache, AARCH64_FPSR_REGNO, ®set->fpsr); + supply_register (regcache, AARCH64_FPCR_REGNO, ®set->fpcr); } /* Debugging of hardware breakpoint/watchpoint support. */ diff --git a/gdb/regformats/aarch64.dat b/gdb/regformats/aarch64.dat index afe1028..0d32183 100644 --- a/gdb/regformats/aarch64.dat +++ b/gdb/regformats/aarch64.dat @@ -35,7 +35,7 @@ expedite:x29,sp,pc 64:x30 64:sp 64:pc -32:cpsr +64:cpsr 128:v0 128:v1 128:v2