From patchwork Thu Jul 3 06:09:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 1872 Received: (qmail 29201 invoked by alias); 3 Jul 2014 06:11:47 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 29021 invoked by uid 89); 3 Jul 2014 06:11:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00 autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 03 Jul 2014 06:11:33 +0000 Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1X2aF0-0006Q4-3f from Yao_Qi@mentor.com for gdb-patches@sourceware.org; Wed, 02 Jul 2014 23:11:30 -0700 Received: from SVR-ORW-FEM-06.mgc.mentorg.com ([147.34.97.120]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Wed, 2 Jul 2014 23:11:29 -0700 Received: from qiyao.dyndns.org.com (147.34.91.1) by SVR-ORW-FEM-06.mgc.mentorg.com (147.34.97.120) with Microsoft SMTP Server id 14.2.247.3; Wed, 2 Jul 2014 23:11:29 -0700 From: Yao Qi To: Subject: [PATCH 2/4] Match instruction adjusts SP in thumb Date: Thu, 3 Jul 2014 14:09:50 +0800 Message-ID: <1404367792-23234-3-git-send-email-yao@codesourcery.com> In-Reply-To: <1404367792-23234-1-git-send-email-yao@codesourcery.com> References: <1404367792-23234-1-git-send-email-yao@codesourcery.com> MIME-Version: 1.0 X-IsSubscribed: yes This is a refactor patch, that moves matching instructions adjusting SP into a new function, thumb_instruction_restores_sp. The second call to thumb_instruction_restores_sp in thumb_in_function_epilogue_p is a little different from the original. The original code matches 'POP without PC', but thumb_in_function_epilogue_p matches 'POP (with and without PC)'. However, GDB found one instruction about return and is scanning the previous instruction, which should be an instruction about return too, so the code change doesn't affect the functionality. gdb: 2014-07-02 Yao Qi * arm-tdep.c (thumb_instruction_restores_sp): New function. (thumb_in_function_epilogue_p): Call thumb_instruction_restores_sp. --- gdb/arm-tdep.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 0fc7fc1..153ef42 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -685,6 +685,17 @@ thumb2_instruction_changes_pc (unsigned short inst1, unsigned short inst2) return 0; } +/* Return 1 if the 16-bit Thumb instruction INSN restores SP in + epilogue, 0 otherwise. */ + +static int +thumb_instruction_restores_sp (unsigned short insn) +{ + return (insn == 0x46bd /* mov sp, r7 */ + || (insn & 0xff80) == 0xb000 /* add sp, imm */ + || (insn & 0xfe00) == 0xbc00); /* pop */ +} + /* Analyze a Thumb prologue, looking for a recognizable stack frame and frame pointer. Scan until we encounter a store that could clobber the stack frame unexpectedly, or an unknown instruction. @@ -3257,14 +3268,10 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) found_return = 1; else if (insn == 0x46f7) /* mov pc, lr */ found_return = 1; - else if (insn == 0x46bd) /* mov sp, r7 */ - found_stack_adjust = 1; - else if ((insn & 0xff80) == 0xb000) /* add sp, imm */ - found_stack_adjust = 1; - else if ((insn & 0xfe00) == 0xbc00) /* pop */ + else if (thumb_instruction_restores_sp (insn)) { found_stack_adjust = 1; - if (insn & 0x0100) /* include PC. */ + if ((insn & 0xfe00) == 0xbd00) /* pop */ found_return = 1; } else if (thumb_insn_size (insn) == 4) /* 32-bit Thumb-2 instruction */ @@ -3317,11 +3324,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) insn = extract_unsigned_integer (buf, 2, byte_order_for_code); insn2 = extract_unsigned_integer (buf + 2, 2, byte_order_for_code); - if (insn2 == 0x46bd) /* mov sp, r7 */ - found_stack_adjust = 1; - else if ((insn2 & 0xff80) == 0xb000) /* add sp, imm */ - found_stack_adjust = 1; - else if ((insn2 & 0xff00) == 0xbc00) /* pop without PC */ + if (thumb_instruction_restores_sp (insn2)) found_stack_adjust = 1; else if (insn == 0xe8bd) /* ldm.w sp!, */ found_stack_adjust = 1;