diff mbox series

[1/4] RISC-V: Add test cases for cpymem expansion

Message ID	20240508051756.3999080-2-christoph.muellner@vrull.eu
State	Accepted
Headers	DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E5B493858D34 From: =?utf-8?q?Christoph_M=C3=BCllner?= <christoph.muellner@vrull.eu> To: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Philipp Tomsich <philipp.tomsich@vrull.eu>, Jeff Law <jeffreyalaw@gmail.com>, Vineet Gupta <vineetg@rivosinc.com> Cc: =?utf-8?q?Christoph_M=C3=BCllner?= <christoph.muellner@vrull.eu> Subject: [PATCH 1/4] RISC-V: Add test cases for cpymem expansion Date: Wed, 8 May 2024 07:17:53 +0200 Message-ID: <20240508051756.3999080-2-christoph.muellner@vrull.eu> In-Reply-To: <20240508051756.3999080-1-christoph.muellner@vrull.eu> References: <20240508051756.3999080-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org
Series	RISC-V: Enhance unaligned/overlapping codegen \| [0/4] RISC-V: Enhance unaligned/overlapping codegen [1/4] RISC-V: Add test cases for cpymem expansion [2/4] RISC-V: Allow unaligned accesses in cpymemsi expansion [3/4] RISC-V: tune: Add setting for overlapping mem ops to tuning struct [4/4] RISC-V: Allow by-pieces to do overlapping accesses in block_move_straight

Checks

Context	Check	Description
rivoscibot/toolchain-ci-rivos-lint	success	Lint passed
rivoscibot/toolchain-ci-rivos-apply-patch	success	Patch applied
rivoscibot/toolchain-ci-rivos-build--newlib-rv64gc-lp64d-multilib	success	Build passed
rivoscibot/toolchain-ci-rivos-build--linux-rv32gc_zba_zbb_zbc_zbs-ilp32d-non-multilib	success	Build passed
rivoscibot/toolchain-ci-rivos-build--linux-rv64gc_zba_zbb_zbc_zbs-lp64d-non-multilib	success	Build passed
rivoscibot/toolchain-ci-rivos-build--linux-rv64gcv-lp64d-multilib	success	Build passed
rivoscibot/toolchain-ci-rivos-build--newlib-rv64gcv-lp64d-multilib	success	Build passed
rivoscibot/toolchain-ci-rivos-test	success	Testing passed

Commit Message

Christoph Müllner May 8, 2024, 5:17 a.m. UTC

  We have two mechanisms in the RISC-V backend that expand
cpymem pattern: a) by-pieces, b) riscv_expand_block_move()
in riscv-string.cc. The by-pieces framework has higher priority
and emits a sequence of up to 15 instructions
(see use_by_pieces_infrastructure_p() for more details).

As a rule-of-thumb, by-pieces emits alternating load/store sequences
and the setmem expansion in the backend emits a sequence of loads
followed by a sequence of stores.

Let's add some test cases to document the current behaviour
and to have tests to identify regressions.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cpymem-32-ooo.c: New test.
	* gcc.target/riscv/cpymem-32.c: New test.
	* gcc.target/riscv/cpymem-64-ooo.c: New test.
	* gcc.target/riscv/cpymem-64.c: New test.
---
 .../gcc.target/riscv/cpymem-32-ooo.c          | 131 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/cpymem-32.c    | 138 ++++++++++++++++++
 .../gcc.target/riscv/cpymem-64-ooo.c          | 129 ++++++++++++++++
 gcc/testsuite/gcc.target/riscv/cpymem-64.c    | 138 ++++++++++++++++++
 4 files changed, 536 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/cpymem-32-ooo.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cpymem-32.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cpymem-64-ooo.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cpymem-64.c

Comments

Jeff Law May 9, 2024, 9:15 p.m. UTC | #1

On 5/7/24 11:17 PM, Christoph Müllner wrote:
> We have two mechanisms in the RISC-V backend that expand
> cpymem pattern: a) by-pieces, b) riscv_expand_block_move()
> in riscv-string.cc. The by-pieces framework has higher priority
> and emits a sequence of up to 15 instructions
> (see use_by_pieces_infrastructure_p() for more details).
> 
> As a rule-of-thumb, by-pieces emits alternating load/store sequences
> and the setmem expansion in the backend emits a sequence of loads
> followed by a sequence of stores.
> 
> Let's add some test cases to document the current behaviour
> and to have tests to identify regressions.
> 
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/cpymem-32-ooo.c: New test.
> 	* gcc.target/riscv/cpymem-32.c: New test.
> 	* gcc.target/riscv/cpymem-64-ooo.c: New test.
> 	* gcc.target/riscv/cpymem-64.c: New test.
It looks like those function body tests are fairly generic.  So OK.

Jeff

diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-32-ooo.c b/gcc/testsuite/gcc.target/riscv/cpymem-32-ooo.c
new file mode 100644
index 00000000000..33fb9891d82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymem-32-ooo.c
@@ -0,0 +1,131 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target rv32 } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -mtune=generic-ooo" } */
+/* { dg-skip-if "" { *-*-* } {"-O0" "-Os" "-Og" "-Oz" "-flto" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-allow-blank-lines-in-output 1 } */
+
+#define COPY_N(N)					\
+void copy_##N (void *to, void *from)			\
+{							\
+  __builtin_memcpy (to, from, N);			\
+}
+
+#define COPY_ALIGNED_N(N)				\
+void copy_aligned_##N (void *to, void *from)		\
+{							\
+  to = __builtin_assume_aligned(to, sizeof(long));	\
+  from = __builtin_assume_aligned(from, sizeof(long));	\
+  __builtin_memcpy (to, from, N);			\
+}
+
+/*
+**copy_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_N(7)
+
+/*
+**copy_aligned_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(7)
+
+/*
+**copy_8:
+**    ...
+**    lw\ta[0-9],0\(a[0-9]\)
+**    sw\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_N(8)
+
+/*
+**copy_aligned_8:
+**    ...
+**    lw\ta[0-9],0\(a[0-9]\)
+**    sw\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(8)
+
+/*
+**copy_11:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_N(11)
+
+/*
+**copy_aligned_11:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(11)
+
+/*
+**copy_15:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(15)
+
+/*
+**copy_aligned_15:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],14\([at][0-9]\)
+**    sb\t[at][0-9],14\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(15)
+
+/*
+**copy_27:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(27)
+
+/*
+**copy_aligned_27:
+**    ...
+**    lw\t[at][0-9],20\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],20\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],26\([at][0-9]\)
+**    sb\t[at][0-9],26\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(27)
diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-32.c b/gcc/testsuite/gcc.target/riscv/cpymem-32.c
new file mode 100644
index 00000000000..44ba14a1d51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymem-32.c
@@ -0,0 +1,138 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target rv32 } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -mtune=rocket" } */
+/* { dg-skip-if "" { *-*-* } {"-O0" "-Os" "-Og" "-Oz" "-flto" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-allow-blank-lines-in-output 1 } */
+
+#define COPY_N(N)					\
+void copy_##N (void *to, void *from)			\
+{							\
+  __builtin_memcpy (to, from, N);			\
+}
+
+#define COPY_ALIGNED_N(N)				\
+void copy_aligned_##N (void *to, void *from)		\
+{							\
+  to = __builtin_assume_aligned(to, sizeof(long));	\
+  from = __builtin_assume_aligned(from, sizeof(long));	\
+  __builtin_memcpy (to, from, N);			\
+}
+
+/*
+**copy_7:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_N(7)
+
+/*
+**copy_aligned_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(7)
+
+/*
+**copy_8:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],7\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],7\([at][0-9]\)
+**    ...
+*/
+COPY_N(8)
+
+/*
+**copy_aligned_8:
+**    ...
+**    lw\ta[0-9],0\(a[0-9]\)
+**    sw\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(8)
+
+/*
+**copy_11:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_N(11)
+
+/*
+**copy_aligned_11:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(11)
+
+/*
+**copy_15:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(15)
+
+/*
+**copy_aligned_15:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],14\([at][0-9]\)
+**    sb\t[at][0-9],14\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(15)
+
+/*
+**copy_27:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(27)
+
+/*
+**copy_aligned_27:
+**    ...
+**    lw\t[at][0-9],20\([at][0-9]\)
+**    ...
+**    sw\t[at][0-9],20\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],26\([at][0-9]\)
+**    sb\t[at][0-9],26\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(27)
diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-64-ooo.c b/gcc/testsuite/gcc.target/riscv/cpymem-64-ooo.c
new file mode 100644
index 00000000000..8e40e52fa91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymem-64-ooo.c
@@ -0,0 +1,129 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target rv64 } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=generic-ooo" } */
+/* { dg-skip-if "" { *-*-* } {"-O0" "-Os" "-Og" "-Oz" "-flto" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-allow-blank-lines-in-output 1 } */
+
+#define COPY_N(N)					\
+void copy_##N (void *to, void *from)			\
+{							\
+  __builtin_memcpy (to, from, N);			\
+}
+
+#define COPY_ALIGNED_N(N)				\
+void copy_aligned_##N (void *to, void *from)		\
+{							\
+  to = __builtin_assume_aligned(to, sizeof(long));	\
+  from = __builtin_assume_aligned(from, sizeof(long));	\
+  __builtin_memcpy (to, from, N);			\
+}
+
+/*
+**copy_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_N(7)
+
+/*
+**copy_aligned_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(7)
+
+/*
+**copy_8:
+**    ...
+**    ld\ta[0-9],0\(a[0-9]\)
+**    sd\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_N(8)
+
+/*
+**copy_aligned_8:
+**    ...
+**    ld\ta[0-9],0\(a[0-9]\)
+**    sd\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(8)
+
+/*
+**copy_11:
+**    ...
+**    ld\t[at][0-9],0\([at][0-9]\)
+**    sd\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_N(11)
+
+/*
+**copy_aligned_11:
+**    ...
+**    ld\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(11)
+
+/*
+**copy_15:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(15)
+
+/*
+**copy_aligned_15:
+**    ...
+**    ld\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],14\([at][0-9]\)
+**    sb\t[at][0-9],14\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(15)
+
+/*
+**copy_27:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(27)
+
+/*
+**copy_aligned_27:
+**    ...
+**    ld\t[at][0-9],16\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],16\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],26\([at][0-9]\)
+**    sb\t[at][0-9],26\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(27)
diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-64.c b/gcc/testsuite/gcc.target/riscv/cpymem-64.c
new file mode 100644
index 00000000000..bdfaca0d46a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymem-64.c
@@ -0,0 +1,138 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target rv64 } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=rocket" } */
+/* { dg-skip-if "" { *-*-* } {"-O0" "-Os" "-Og" "-Oz" "-flto" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-allow-blank-lines-in-output 1 } */
+
+#define COPY_N(N)					\
+void copy_##N (void *to, void *from)			\
+{							\
+  __builtin_memcpy (to, from, N);			\
+}
+
+#define COPY_ALIGNED_N(N)				\
+void copy_aligned_##N (void *to, void *from)		\
+{							\
+  to = __builtin_assume_aligned(to, sizeof(long));	\
+  from = __builtin_assume_aligned(from, sizeof(long));	\
+  __builtin_memcpy (to, from, N);			\
+}
+
+/*
+**copy_7:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_N(7)
+
+/*
+**copy_aligned_7:
+**    ...
+**    lw\t[at][0-9],0\([at][0-9]\)
+**    sw\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],6\([at][0-9]\)
+**    sb\t[at][0-9],6\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(7)
+
+/*
+**copy_8:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],7\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],7\([at][0-9]\)
+**    ...
+*/
+COPY_N(8)
+
+/*
+**copy_aligned_8:
+**    ...
+**    ld\ta[0-9],0\(a[0-9]\)
+**    sd\ta[0-9],0\(a[0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(8)
+
+/*
+**copy_11:
+**    ...
+**    lbu\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_N(11)
+
+/*
+**copy_aligned_11:
+**    ...
+**    ld\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],10\([at][0-9]\)
+**    sb\t[at][0-9],10\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(11)
+
+/*
+**copy_15:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(15)
+
+/*
+**copy_aligned_15:
+**    ...
+**    ld\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],0\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],14\([at][0-9]\)
+**    sb\t[at][0-9],14\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(15)
+
+/*
+**copy_27:
+**    ...
+**    (call|tail)\tmemcpy
+**    ...
+*/
+COPY_N(27)
+
+/*
+**copy_aligned_27:
+**    ...
+**    ld\t[at][0-9],16\([at][0-9]\)
+**    ...
+**    sd\t[at][0-9],16\([at][0-9]\)
+**    ...
+**    lbu\t[at][0-9],26\([at][0-9]\)
+**    sb\t[at][0-9],26\([at][0-9]\)
+**    ...
+*/
+COPY_ALIGNED_N(27)