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[0/3] x86: Optimize the encoder of the vvvv register

Message ID 20240424072356.2433122-1-lili.cui@intel.com
Headers
Series x86: Optimize the encoder of the vvvv register |

Message

Cui, Lili April 24, 2024, 7:23 a.m. UTC 
  These patches want to optimize the encoder of the vvvv register.
Previously we used Vexvvvv, SWAP_SOURCES and extension_opcode
to help encode the vvvv register, these patches simplified the
logic to only use vexvvvv and added appropriate Vexvvvv values
for the related instructions.

Cui, Lili (3):
  x86: Use vexvvvv to encode the vvvv register
  x86: Drop SwapSources
  x86: Drop using extension_opcode to encode vvvv register

 gas/config/tc-i386.c                    |   56 +-
 gas/testsuite/gas/i386/x86-64-sse2avx.d |    7 +
 gas/testsuite/gas/i386/x86-64-sse2avx.s |    7 +
 opcodes/i386-opc.h                      |   21 +-
 opcodes/i386-opc.tbl                    | 1154 ++++++++++++-----------
 5 files changed, 628 insertions(+), 617 deletions(-)