Patchwork mips: fix testsuite build for O32 FPXX ABI on pre-R2 CPU

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Submitter Aurelien Jarno
Date Dec. 9, 2015, 2:28 p.m.
Message ID <1449671319-7427-1-git-send-email-aurelien@aurel32.net>
Download mbox | patch
Permalink /patch/9947/
State New
Headers show

Comments

Aurelien Jarno - Dec. 9, 2015, 2:28 p.m.
On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite
fails to build for pre-R2 CPU.

It assumes that it is possible to use the -mfp64 option to build
tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which
supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU:

  error: '-mgp32' and '-mfp64' can only be combined if the target
  supports the mfhc1 and mthc1 instructions

The same way it assumes that it is possible to use the -modd-spreg option
to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at
least a R1 CPU:

  warning: the 'mips2' architecture does not support odd
  single-precision registers

This patches changes that by checking the usability of -mfp64 and
-modd-spreg options in configure, and disable those tests when they can
not be used.
---
 ChangeLog                                 | 14 ++++++++++++++
 sysdeps/mips/Makefile                     |  6 ++++++
 sysdeps/unix/sysv/linux/mips/configure    | 27 +++++++++++++++++++++++++++
 sysdeps/unix/sysv/linux/mips/configure.ac |  7 +++++++
 4 files changed, 54 insertions(+)
Joseph Myers - Dec. 9, 2015, 3:53 p.m.
On Wed, 9 Dec 2015, Aurelien Jarno wrote:

> On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite
> fails to build for pre-R2 CPU.
> 
> It assumes that it is possible to use the -mfp64 option to build
> tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which
> supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU:
> 
>   error: '-mgp32' and '-mfp64' can only be combined if the target
>   supports the mfhc1 and mthc1 instructions
> 
> The same way it assumes that it is possible to use the -modd-spreg option
> to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at
> least a R1 CPU:
> 
>   warning: the 'mips2' architecture does not support odd
>   single-precision registers
> 
> This patches changes that by checking the usability of -mfp64 and
> -modd-spreg options in configure, and disable those tests when they can
> not be used.

OK.

Patch

diff --git a/ChangeLog b/ChangeLog
index 3205cee..7af237f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,17 @@ 
+2015-12-09  Aurelien Jarno  <aurelien@aurel32.net>
+
+	* sysdeps/unix/sysv/linux/mips/configure.ac (has-mpf64): Define to
+	record the current if the current ABI and CPU support the FP64
+	extension.
+	(has-modd-spreg): Define to record the current if the current ABI and
+	CPU support 32-bit floating point values in odd FPU registers.
+	* sysdeps/unix/sysv/linux/mips/configure: Regenerate.
+	* sysdeps/mips/Makefile (tst-abi-fpxxomod): Only build when
+	$(has-modd-spreg) equals yes.
+	(tst-abi-fp64amod): Only build when $(has-mpf64) equals yes.
+	(tst-abi-fp64mod): Only build when both $(has-mpf64) and
+	$(has-modd-spreg) equal yes.
+
 2015-12-08  Siddhesh Poyarekar  <sid@reserved-bit.com>
 
 	* benchtests/Makefile (bench-math): Move ffs and ffsll...
diff --git a/sysdeps/mips/Makefile b/sysdeps/mips/Makefile
index 463b121..3d35523 100644
--- a/sysdeps/mips/Makefile
+++ b/sysdeps/mips/Makefile
@@ -42,17 +42,23 @@  fpabi-modules-names += tst-abi-fpxxmod
 CFLAGS-tst-abi-fpxxmod.c += -mfpxx -mno-odd-spreg
 endif
 ifneq (,$(filter $(o32-fpabi),xx xxo))
+ifeq ($(has-modd-spreg),yes)
 fpabi-modules-names += tst-abi-fpxxomod
 CFLAGS-tst-abi-fpxxomod.c += -mfpxx -modd-spreg
 endif
+endif
 ifneq (,$(filter $(o32-fpabi),xx 64a))
+ifeq ($(has-mpf64),yes)
 fpabi-modules-names += tst-abi-fp64amod
 CFLAGS-tst-abi-fp64amod.c += -mfp64 -mno-odd-spreg
 endif
+endif
 ifneq (,$(filter $(o32-fpabi),xx xxo 64a 64))
+ifeq ($(has-mpf64)-$(has-modd-spreg),yes-yes)
 fpabi-modules-names += tst-abi-fp64mod
 CFLAGS-tst-abi-fp64mod.c += -mfp64 -modd-spreg
 endif
+endif
 modules-names += $(fpabi-modules-names)
 
 comma:=,
diff --git a/sysdeps/unix/sysv/linux/mips/configure b/sysdeps/unix/sysv/linux/mips/configure
index 2d79f55..dee56aa 100644
--- a/sysdeps/unix/sysv/linux/mips/configure
+++ b/sysdeps/unix/sysv/linux/mips/configure
@@ -106,6 +106,8 @@  if test -z "$libc_mips_float"; then
 fi
 
 libc_mips_o32_fp=
+libc_cv_mips_fp64=
+libc_cv_mips_modd_spreg=
 
 if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then
   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -219,9 +221,34 @@  fi
 rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
 fi
 rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+
+  if { ac_try='${CC-cc} -mfp64 -xc /dev/null -S -o /dev/null'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }; then :
+  libc_cv_mips_fp64=yes
+else
+  libc_cv_mips_fp64=no
+fi
+  if { ac_try='${CC-cc} -Werror -modd-spreg -xc /dev/null -S -o /dev/null'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }; then :
+  libc_cv_mips_modd_spreg=yes
+else
+  libc_cv_mips_modd_spreg=no
+fi
 fi
 config_vars="$config_vars
 o32-fpabi = ${libc_mips_o32_fp}"
+config_vars="$config_vars
+has-mpf64 = ${libc_cv_mips_fp64}"
+config_vars="$config_vars
+has-modd-spreg = ${libc_cv_mips_modd_spreg}"
 
 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 /* end confdefs.h.  */
diff --git a/sysdeps/unix/sysv/linux/mips/configure.ac b/sysdeps/unix/sysv/linux/mips/configure.ac
index 5039ec9..45147c5 100644
--- a/sysdeps/unix/sysv/linux/mips/configure.ac
+++ b/sysdeps/unix/sysv/linux/mips/configure.ac
@@ -45,6 +45,8 @@  if test -z "$libc_mips_float"; then
 fi
 
 libc_mips_o32_fp=
+libc_cv_mips_fp64=
+libc_cv_mips_modd_spreg=
 
 if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then
   AC_COMPILE_IFELSE(
@@ -84,8 +86,13 @@  if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then
               [libc_mips_o32_fp=64],
               [])])])])])],
     [])
+
+  LIBC_TRY_CC_OPTION([-mfp64], [libc_cv_mips_fp64=yes], [libc_cv_mips_fp64=no])
+  LIBC_TRY_CC_OPTION([-Werror -modd-spreg], [libc_cv_mips_modd_spreg=yes], [libc_cv_mips_modd_spreg=no])
 fi
 LIBC_CONFIG_VAR([o32-fpabi],[${libc_mips_o32_fp}])
+LIBC_CONFIG_VAR([has-mpf64],[${libc_cv_mips_fp64}])
+LIBC_CONFIG_VAR([has-modd-spreg],[${libc_cv_mips_modd_spreg}])
 
 AC_COMPILE_IFELSE(
   [AC_LANG_PROGRAM([