diff mbox

[AArch64] Cleanup comments in instruction decoding functions

Message ID 1441985346-32257-1-git-send-email-pierre.langlois@arm.com
State New, archived
Headers

Commit Message

Pierre Langlois Sept. 11, 2015, 3:29 p.m. UTC 
  Hi all,

This patch simply moves a couple of comments for consistency and fixes a
typo.

Thanks,
Pierre

gdb/ChangeLog:

	* aarch64-tdep.c (decode_cb): Move up comment describing the
	encoding.
	(decode_tb): Fix a typo in comment above the function.  Move up
	comment describing the encoding.
---
 gdb/aarch64-tdep.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

Comments

Yao Qi Sept. 11, 2015, 3:58 p.m. UTC | #1 
Pierre Langlois <pierre.langlois@arm.com> writes:

> This patch simply moves a couple of comments for consistency and fixes a
> typo.
>
> Thanks,
> Pierre
>
> gdb/ChangeLog:
>
> 	* aarch64-tdep.c (decode_cb): Move up comment describing the
> 	encoding.
> 	(decode_tb): Fix a typo in comment above the function.  Move up
> 	comment describing the encoding.

The change is obvious.  Please push.
diff mbox

Patch

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index a4d8186..2ac1a49 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -401,11 +401,10 @@  static int
 decode_cb (CORE_ADDR addr, uint32_t insn, int *is64, int *is_cbnz,
 	   unsigned *rn, int32_t *offset)
 {
+  /* cbz  T011 010o iiii iiii iiii iiii iiir rrrr */
+  /* cbnz T011 010o iiii iiii iiii iiii iiir rrrr */
   if (decode_masked_match (insn, 0x7e000000, 0x34000000))
     {
-      /* cbz  T011 010o iiii iiii iiii iiii iiir rrrr */
-      /* cbnz T011 010o iiii iiii iiii iiii iiir rrrr */
-
       *rn = (insn >> 0) & 0x1f;
       *is64 = (insn >> 31) & 0x1;
       *is_cbnz = (insn >> 24) & 0x1;
@@ -628,7 +627,7 @@  decode_stur (CORE_ADDR addr, uint32_t insn, int *is64, unsigned *rt,
   return 0;
 }
 
-/* Decode an opcode if it represents a TB or TBNZ instruction.
+/* Decode an opcode if it represents a TBZ or TBNZ instruction.
 
    ADDR specifies the address of the opcode.
    INSN specifies the opcode to test.
@@ -643,11 +642,10 @@  static int
 decode_tb (CORE_ADDR addr, uint32_t insn, int *is_tbnz, unsigned *bit,
 	   unsigned *rt, int32_t *imm)
 {
+  /* tbz  b011 0110 bbbb biii iiii iiii iiir rrrr */
+  /* tbnz B011 0111 bbbb biii iiii iiii iiir rrrr */
   if (decode_masked_match (insn, 0x7e000000, 0x36000000))
     {
-      /* tbz  b011 0110 bbbb biii iiii iiii iiir rrrr */
-      /* tbnz B011 0111 bbbb biii iiii iiii iiir rrrr */
-
       *rt = (insn >> 0) & 0x1f;
       *is_tbnz = (insn >> 24) & 0x1;
       *bit = ((insn >> (31 - 4)) & 0x20) | ((insn >> 19) & 0x1f);