From patchwork Wed Apr 15 13:51:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 6231 Received: (qmail 27658 invoked by alias); 15 Apr 2015 13:51:51 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 27648 invoked by uid 89); 15 Apr 2015 13:51:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f173.google.com Received: from mail-pd0-f173.google.com (HELO mail-pd0-f173.google.com) (209.85.192.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 15 Apr 2015 13:51:49 +0000 Received: by pdbqd1 with SMTP id qd1so53361523pdb.2 for ; Wed, 15 Apr 2015 06:51:47 -0700 (PDT) X-Received: by 10.68.161.4 with SMTP id xo4mr46929691pbb.65.1429105907325; Wed, 15 Apr 2015 06:51:47 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by mx.google.com with ESMTPSA id ea4sm4205878pbb.94.2015.04.15.06.51.46 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Apr 2015 06:51:46 -0700 (PDT) From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH] [arm] Fix fails in gdb.base/disp-step-syscall.exp Date: Wed, 15 Apr 2015 14:51:39 +0100 Message-Id: <1429105899-9232-1-git-send-email-qiyaoltc@gmail.com> X-IsSubscribed: yes From: Yao Qi Hi, I see this fail on arm-linux target, FAIL: gdb.base/disp-step-syscall.exp: fork: single step over fork final pc which is caused by the PC isn't expected after displaced stepping the svc instruction. The code is: => 0xb6ead9a4 <__libc_do_syscall+4>: svc 0 0xb6ead9a6 <__libc_do_syscall+6>: pop {r7, pc} 0xb6ead9a8: nop.w^M 0xb6ead9ac: nop.w after single step svc instruction, pc should be 0xb6ead9a6, but the actual value of pc is 0xb6ead9a8. The problem is illustrated by turning on debug message of displaced stepping, stepi^M displaced: stepping Thread 12031 now^M displaced: saved 0x8574: 02 bc 6a 46 04 b4 01 b4 df f8 10 c0 4d f8 04 cd 03 48 04 4b ff f7 d2 ef ff f7 e8 ef 0d 87 00 00 ^M displaced: process thumb insn df00 at b6ead9a4^M displaced: copying svc insn df00^M displaced: read r7 value 00000078^M displaced: sigreturn/rt_sigreturn SVC call not in signal trampoline frame^M displaced: writing insn df00 at 00008574^M displaced: copy 0xb6ead9a4->0x8574: displaced: check mode of b6ead9a4 instead of 00008574^M displaced: displaced pc to 0x8574^M displaced: run 0x8574: 00 df 01 de ^M displaced: restored Thread 12031 0x8574^M displaced: PC is apparently 00008576 after SVC step (within scratch space)^M displaced: writing pc b6ead9a8 <----- WRONG ADDRESS GDB writes the wrong address back to pc because GDB thinks the instruction size is 4, which isn't true for thumb instruction. This patch is to replace 4 with dsc->insn_size. I'll commit it. gdb: 2015-04-15 Yao Qi * arm-linux-tdep.c (arm_linux_cleanup_svc): Use dsc->insn_size instead of 4. --- gdb/arm-linux-tdep.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index f58da84..adc7831 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -939,7 +939,6 @@ arm_linux_cleanup_svc (struct gdbarch *gdbarch, struct regcache *regs, struct displaced_step_closure *dsc) { - CORE_ADDR from = dsc->insn_addr; ULONGEST apparent_pc; int within_scratch; @@ -960,7 +959,8 @@ arm_linux_cleanup_svc (struct gdbarch *gdbarch, } if (within_scratch) - displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC); + displaced_write_reg (regs, dsc, ARM_PC_REGNUM, + dsc->insn_addr + dsc->insn_size, BRANCH_WRITE_PC); } static int