From patchwork Tue Feb 11 22:55:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Terekhov, Mikhail via Gdb-patches" X-Patchwork-Id: 37981 Received: (qmail 99998 invoked by alias); 11 Feb 2020 22:55:12 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 99979 invoked by uid 89); 11 Feb 2020 22:55:11 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=H*r:sk:mail-yb, HX-HELO:sk:mail-yb, HX-Spam-Relays-External:sk:mail-yb, H*RU:sk:mail-yb X-HELO: mail-yb1-f202.google.com Received: from mail-yb1-f202.google.com (HELO mail-yb1-f202.google.com) (209.85.219.202) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 11 Feb 2020 22:55:09 +0000 Received: by mail-yb1-f202.google.com with SMTP id g7so265129ybo.14 for ; Tue, 11 Feb 2020 14:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:message-id:mime-version:subject:from:to:cc; bh=ov8wartkRT2QXqC/QHETXvphUFma0O4EcXEeax/y23Q=; b=V7dFM+qohYHXsrEPoEW++nxpEUEN9PdPmCvBMOCwKmLNpXssKwJNPR6vNTvG1ujia0 ezUBfi+4hZ6mxFJHI22tPp2r3gYpvlEIJjVZ4+VP7+dDloVzrOHl404Ltjeq8peFpQWD 58+Znc//HCcKjA7pr6jAjFKxKAThpPVfoN+lx4eIHhSfajvYv4/NBCyKcWxPBdknxhCc eIxx7yj0ckA+xe5AIwGyr7Hi0ai5hhdFjj+MfYQMIItMBiZNdTN+7eA+pDSnsOQNbH1x KbkQDs7YdFyFr6gyrXSbhni0K9Vnfvi1lP6S4eIN9aH2SFWvxHBEzSvscX+C6X4GZ+2p Ndtw== Date: Tue, 11 Feb 2020 16:55:03 -0600 Message-Id: <20200211225503.32992-1-cbiesinger@google.com> Mime-Version: 1.0 Subject: [PATCH] Fix arm-netbsd build error X-Patchwork-Original-From: "Christian Biesinger via gdb-patches" From: "Terekhov, Mikhail via Gdb-patches" Reply-To: Christian Biesinger To: gdb-patches@sourceware.org Cc: Christian Biesinger X-IsSubscribed: yes The floating point register interface has changed to this: https://github.com/NetBSD/src/blob/trunk/sys/arch/arm/include/reg.h It now uses VFP instead of FPA registers. This patch updates arm-nbsd-nat.c accordingly. Tested by compiling on arm-netbsd on qemu. For actually testing, there seems to be something missing as "info registers" only shows FPA registers and no VFP ones. I am still investigating why this is; please let me know if you know. However, I think this is still good to check in as-is. gdb/ChangeLog: 2020-02-11 Christian Biesinger * arm-nbsd-nat.c (arm_supply_fparegset): Rename to... (arm_supply_vfpregset): ...this, and update to use VFP registers. (fetch_fp_register): Update. (fetch_fp_regs): Update. (store_fp_register): Update. (store_fp_regs): Update. (fetch_elfcore_registers): Update. --- gdb/arm-nbsd-nat.c | 80 ++++++++++++++++++++-------------------------- 1 file changed, 34 insertions(+), 46 deletions(-) diff --git a/gdb/arm-nbsd-nat.c b/gdb/arm-nbsd-nat.c index 11afc289c3..8027f54dfe 100644 --- a/gdb/arm-nbsd-nat.c +++ b/gdb/arm-nbsd-nat.c @@ -65,15 +65,13 @@ arm_supply_gregset (struct regcache *regcache, struct reg *gregset) } static void -arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset) +arm_supply_vfpregset (struct regcache *regcache, struct fpreg *fpregset) { - int regno; - - for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) - regcache->raw_supply (regno, - (char *) &fparegset->fpr[regno - ARM_F0_REGNUM]); + struct vfpreg &vfp = fpregset->fpr_vfp; + for (int regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) + regcache->raw_supply (regno, (char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]); - regcache->raw_supply (ARM_FPS_REGNUM, (char *) &fparegset->fpr_fpsr); + regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr); } static void @@ -147,10 +145,10 @@ static void fetch_fp_register (struct regcache *regcache, int regno) { struct fpreg inferior_fp_registers; - int ret; + int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); - ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (), - (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); + struct vfpreg &vfp = inferior_fp_registers.fpr_vfp; if (ret < 0) { @@ -158,18 +156,15 @@ fetch_fp_register (struct regcache *regcache, int regno) return; } - switch (regno) + if (regno == ARM_FPSCR_REGNUM) + regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr); + else if (regno >= ARM_D0_REGNUM && regno <= ARM_D31_REGNUM) { - case ARM_FPS_REGNUM: - regcache->raw_supply (ARM_FPS_REGNUM, - (char *) &inferior_fp_registers.fpr_fpsr); - break; - - default: - regcache->raw_supply - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); - break; + regcache->raw_supply (regno, + (char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]); } + else + warning (_("Invalid register number.")); } static void @@ -188,7 +183,7 @@ fetch_fp_regs (struct regcache *regcache) return; } - arm_supply_fparegset (regcache, &inferior_fp_registers); + arm_supply_vfpregset (regcache, &inferior_fp_registers); } void @@ -327,10 +322,9 @@ static void store_fp_register (const struct regcache *regcache, int regno) { struct fpreg inferior_fp_registers; - int ret; - - ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (), - (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); + int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); + struct vfpreg &vfp = inferior_fp_registers.fpr_vfp; if (ret < 0) { @@ -338,18 +332,15 @@ store_fp_register (const struct regcache *regcache, int regno) return; } - switch (regno) + if (regno == ARM_FPSCR_REGNUM) + regcache->raw_collect (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr); + else if (regno >= ARM_D0_REGNUM && regno <= ARM_D31_REGNUM) { - case ARM_FPS_REGNUM: - regcache->raw_collect (ARM_FPS_REGNUM, - (char *) &inferior_fp_registers.fpr_fpsr); - break; - - default: - regcache->raw_collect - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); - break; + regcache->raw_collect (regno, + (char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]); } + else + warning (_("Invalid register number.")); ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (), (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); @@ -361,20 +352,17 @@ store_fp_register (const struct regcache *regcache, int regno) static void store_fp_regs (const struct regcache *regcache) { - struct fpreg inferior_fp_registers; - int ret; - int regno; + struct fpreg fpregs; - - for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) + for (int regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) regcache->raw_collect - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); + (regno, (char *) &fpregs.fpr_vfp.vfp_regs[regno - ARM_D0_REGNUM]); - regcache->raw_collect (ARM_FPS_REGNUM, - (char *) &inferior_fp_registers.fpr_fpsr); + regcache->raw_collect (ARM_FPSCR_REGNUM, + (char *) &fpregs.fpr_vfp.vfp_fpscr); - ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (), - (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); + int ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (), + (PTRACE_TYPE_ARG3) &fpregs, 0); if (ret < 0) warning (_("unable to store floating-point registers")); @@ -427,7 +415,7 @@ fetch_elfcore_registers (struct regcache *regcache, /* The memcpy may be unnecessary, but we can't really be sure of the alignment of the data in the core file. */ memcpy (&fparegset, core_reg_sect, sizeof (fparegset)); - arm_supply_fparegset (regcache, &fparegset); + arm_supply_vfpregset (regcache, &fparegset); } break;