From patchwork Sat Aug 10 01:00:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 34046 Received: (qmail 79117 invoked by alias); 10 Aug 2019 01:04:11 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 79036 invoked by uid 89); 10 Aug 2019 01:04:10 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy= X-HELO: esa3.hgst.iphmx.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1565399050; x=1596935050; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3WL33cqlBy6kUrBLNPXnotMo3FWl+qooN7HzCOpKLnU=; b=c9nrWQ5nPTJUDMASMqnJxp6s43GRv2C4YHLUiVWTVBYkEFEUTFt5ic/I PV3cM8jLDrL+zE1h5vVfFvLkc/qGpaUKP5odu0PrpJMxUP48vPRKmg1/y YL9Nq2llynP5ejF2skRyEX35/LsceHkDsMMOGefezQUEybAw28AGhN5M2 GJEBcPDh8Xg4+Nf8mLfi+Jw70YDfxZH3ch6T7aBsftYBlxU5Oun5jySLK epxMbqH5JJVdhM2nx3SM0Ba2IOW5BLujgDl15SrdL9pXRpDre9/vQRLpI HEVCigQJnXpx82hUiLmNg8JQ0TCyazcdHHVqCzjuSHnhPpqh1ni1KnbVg A==; IronPort-SDR: MMFYhs6+j9cTZdaZYCUWes3HP8IHi6Nlwpp8k/Pi81kwlJxhG3JoQHh/e2JYdKy7eKXdEiEKzi zTKz1BUBn7b+nG2VZNGq+QDkjxprjwDVJk8dSQzxNP45eJ0eaOX3cM7DkpAL7vz9T2vBCNAbnm xJklRLCYIjIpNJ9oZI5hLuFFm8HUzOXxShGLWDH0SDyBDOVBO7Nb9cLdfuvYySizAFSVnDUNub PlJUqIdwLZoyoNoFazoKq219joofP3Nx+seWHZmNgdQIdjsroHuz7nLfvJI1Qoib5sYMXiscPh I6w= IronPort-SDR: /sMs2BBt0wdswyMnFHvSq/KzTQsQ0xIq3Su34MQjRhccl7cfGSON4sioPclF1OUpYiHd7LXymV p5I9+Si3kDGjWyvkzJvyCKb1dI1HsrLC3u8iMz8EggmLHxtKTHr56Gmkxaqux3HsWReerAH6bd NiDNDAPNB5QxyPS2Q4Boe5h0g8zrpe8VYwCb5SVhc61+JXqn8W/uURKwOxL+Bd+eKFBe6ZP1Yz zHuOz1lAaXG4pjl3bI884bBpW6w88WNWuvQN3tJ9MetR9VZDistu7PRW9FWqqJWmqX0WfWhvtI phmH+BEjo314jyMDMadrddVl IronPort-SDR: w75yX0LPwnF4Dp4E4MHzczt/weUDGxov2jfXf05ElQaZivIdTybB/xx8b6hAiNA5YI6Idj+mLr RYOIW0j3ewIoBBvcxsB6REGp7ewYiKRA4oTrm3WcDGTNrvh/Cww3CGgZ7ufVFJnqC/jPNvBoN1 c3DUnsc1TO8EVgJLrxaPlgIqajognKa8GvpDwgFY1ansm2ps3xDpX+0S07zcdNhpn8DwpI2yPs jmOTXSWxEUwgnZjOjKpvLuuEG5D3v9Ab8WngVcgpjHMgYAHg3Bh4fhui9O8xknaX296IUrWm8B aDg= From: Alistair Francis To: libc-alpha@sourceware.org Cc: arnd@arndb.de, adhemerval.zanella@linaro.org, fweimer@redhat.com, palmer@sifive.com, macro@wdc.com, zongbox@gmail.com, alistair.francis@wdc.com, alistair23@gmail.com Subject: [RFC v4 21/24] Add RISC-V 32-bit target to build-many-glibcs.py Date: Fri, 9 Aug 2019 18:00:43 -0700 Message-Id: <8b4388b4a0e42b9a3243af1c1003d93de3858b5f.1565398514.git.alistair.francis@wdc.com> In-Reply-To: References: MIME-Version: 1.0 From: Zong Li Support building three variant of 32 bit RISC-V glibc as follows: - riscv32-linux-gnu-rv32imac-ilp32 - riscv32-linux-gnu-rv32imafdc-ilp32 - riscv32-linux-gnu-rv32imafdc-ilp32d 2018-11-29 Zong Li * scripts/build-many-glibcs.py (Context): Add rv32 targets. --- ChangeLog | 11 +++++++++++ scripts/build-many-glibcs.py | 15 +++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/ChangeLog b/ChangeLog index 3316d22efaf..a3c2443d090 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1501,6 +1501,17 @@ * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise. * sysdeps/riscv/preconfigure: Likewise. * sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h: New file. + * sysdeps/riscv/rv32/Implies-after: New file. + * sysdeps/riscv/rv32/rvd/Implies: Likewise. + * sysdeps/riscv/rv32/rvf/Implies: Likewise. + * sysdeps/unix/sysv/linux/riscv/rv32/Implies: Likewise. + * sysdeps/unix/sysv/linux/riscv/Makefile: Support rv32. + * sysdeps/unix/sysv/linux/riscv/configure: Likewise. + * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise. + * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise. + * sysdeps/riscv/preconfigure: Likewise. + * sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h: New file. + * scripts/build-many-glibcs.py (Context): Add rv32 targets. 2019-06-20 Dmitry V. Levin Florian Weimer diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py index aa6884e046d..205f70168ed 100755 --- a/scripts/build-many-glibcs.py +++ b/scripts/build-many-glibcs.py @@ -320,6 +320,21 @@ class Context(object): self.add_config(arch='powerpc64le', os_name='linux-gnu', gcc_cfg=['--disable-multilib', '--enable-secureplt']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imac-ilp32', + gcc_cfg=['--with-arch=rv32imac', '--with-abi=ilp32', + '--disable-multilib']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imafdc-ilp32', + gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32', + '--disable-multilib']) + self.add_config(arch='riscv32', + os_name='linux-gnu', + variant='rv32imafdc-ilp32d', + gcc_cfg=['--with-arch=rv32imafdc', '--with-abi=ilp32d', + '--disable-multilib']) self.add_config(arch='riscv64', os_name='linux-gnu', variant='rv64imac-lp64',