From patchwork Tue Jun 25 00:09:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 33387 Received: (qmail 24180 invoked by alias); 25 Jun 2019 00:12:13 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 24127 invoked by uid 89); 25 Jun 2019 00:12:12 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, KAM_SHORT autolearn=ham version=3.3.1 spammy= X-HELO: esa6.hgst.iphmx.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1561421531; x=1592957531; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IIs3MzSZhW8bRWbDJ5e4JHrbpZow2ZzISJcAJfeucPI=; b=KpAbMiMS4vPg4zDktXHEkuosDmtkHhYZVnQ6RHKw5WELj/ln8+0Ka/Dv vzORwwWFmAdIl1soklioOKKPX3hbs100KNZ/Y4ghsT7YoeYPyz4nE0+1B Mur9qxncAkK2sERIuuhKAzKMaWFeimxnupBcCt7JKfAkrYEx+DSH6whtB shmO7pUC0e7tjG4TsRD4ZHNk00geqQp7CRj1CxxGPlsut2aCi3B/YPT7d fuikbDokZVnFBbLMJXJaKQ+ATzaRWpeA8JrHKm17OQPg+NwZnRcPt/gs/ 0K5nRiF3X3CbN+FEFdUkEapfSm1mGo7DnwGYthwj04/oDWDdg14uV5B0W w==; IronPort-SDR: UBUgZmef2w3Icuw9c9c/BbTtUeKpWORhVIFbM34wt9L7wD3F1jL/hEHc/uY5tI+S56yx2Zx9lY fWSm3Ul91oJVOG0UQQYR37Wn4Xl1mhKNs3ywqDCyfMUjGe2rNsP3fCj7mWJbxOXvDCOz8kVCqA 8w2riXM69VNYCw6fu76QtP0ISDwgMDj0TF1rBkFE1xrrlRrMaLPQos/vjN6FKUXGaDWYQJeMVv KnRjLrvhisG24HIyYRhL52e3oUQd2VKkSXDqdNrnfwt0FRwQvqYhzh8ewP0CczBCGLry6do1GY UtrftV6mAx0Fbbip5mWsl2W9 IronPort-SDR: KnRPFYyjEa/SaB5Wd/EH799lWXhr0yPD6hsuop/O7R+XFKHmpgh03j/GgtyKJW+H8LSM3LQjcH kUYfffawovg0ZQXY7WcDxlQPQE9Ufr7L0ShS5W0UQhDme9HQ8r8fhijF43MB2jI9Z8LKV3l0iW 5dbPiMIczjfcsrjSsyNPG+zvTeIoo3T80gzVZppuMId3/loB1t+fLoA5HrioJXhyCwDvH3CTxB c1H2nhZ8fcLEO81kCmfbf/plMMIkBBiU8wl2jE+fR0Q67gRKXkQTYOfsitFrQcXHfSngNvwP6L tok= From: Alistair Francis To: libc-alpha@sourceware.org Cc: arnd@arndb.de, adhemerval.zanella@linaro.org, fweimer@redhat.com, palmer@sifive.com, macro@wdc.com, zongbox@gmail.com, zong@andestech.com, alistair.francis@wdc.com, alistair23@gmail.com Subject: [RFC v2 19/20] RISC-V: Fix llrint and llround missing exceptions on RV32 Date: Mon, 24 Jun 2019 17:09:41 -0700 Message-Id: <6264a0e13a75e82bb57e11a7cfc1646881f8fd3e.1561421043.git.alistair.francis@wdc.com> In-Reply-To: References: MIME-Version: 1.0 From: Zong Li Similar to the recent fix for MIPS, ARM and S/390, RV32 is missing correct exception on overflow from llrint and llround functions because cast from floating-point types to long long do not result in correct exceptions on overflow. 2018-11-29 Zong Li * sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h: New file. --- ChangeLog | 10 +++++ .../riscv/rv32/fix-fp-int-convert-overflow.h | 38 +++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h diff --git a/ChangeLog b/ChangeLog index 54966f45b8..f731e94fc9 100644 --- a/ChangeLog +++ b/ChangeLog @@ -91,6 +91,16 @@ * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise. * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise. * sysdeps/riscv/preconfigure: Likewise. + * sysdeps/riscv/rv32/Implies-after: New file. + * sysdeps/riscv/rv32/rvd/Implies: Likewise. + * sysdeps/riscv/rv32/rvf/Implies: Likewise. + * sysdeps/unix/sysv/linux/riscv/rv32/Implies: Likewise. + * sysdeps/unix/sysv/linux/riscv/Makefile: Support rv32. + * sysdeps/unix/sysv/linux/riscv/configure: Likewise. + * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise. + * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise. + * sysdeps/riscv/preconfigure: Likewise. + * sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h: New file. 2019-06-20 Dmitry V. Levin Florian Weimer diff --git a/sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h b/sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h new file mode 100644 index 0000000000..6b34a8415e --- /dev/null +++ b/sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h @@ -0,0 +1,38 @@ +/* Fix for conversion of floating point to integer overflow. ARM version. + Copyright (C) 2015-2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef FIX_FP_INT_CONVERT_OVERFLOW_H +#define FIX_FP_INT_CONVERT_OVERFLOW_H 1 + +/* As of GCC 5, the generic libgcc2.c conversions from floating point + to long long may not raise the correct exceptions on overflow (and + may raise spurious "inexact" exceptions even in non-overflow cases, + see ). */ +#define FIX_FLT_LONG_CONVERT_OVERFLOW 0 +#define FIX_FLT_LLONG_CONVERT_OVERFLOW 1 + +#define FIX_DBL_LONG_CONVERT_OVERFLOW 0 +#define FIX_DBL_LLONG_CONVERT_OVERFLOW 1 + +#define FIX_LDBL_LONG_CONVERT_OVERFLOW 0 +#define FIX_LDBL_LLONG_CONVERT_OVERFLOW 0 + +#define FIX_FLT128_LONG_CONVERT_OVERFLOW 0 +#define FIX_FLT128_LLONG_CONVERT_OVERFLOW 0 + +#endif /* fix-fp-int-convert-overflow.h */