From patchwork Sat Jun 8 21:32:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stafford Horne X-Patchwork-Id: 33060 Received: (qmail 116141 invoked by alias); 8 Jun 2019 21:33:03 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 116045 invoked by uid 89); 8 Jun 2019 21:33:02 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.7 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Received:3287, H*r:sk:mail-pg X-HELO: mail-pg1-f177.google.com Received: from mail-pg1-f177.google.com (HELO mail-pg1-f177.google.com) (209.85.215.177) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 08 Jun 2019 21:33:01 +0000 Received: by mail-pg1-f177.google.com with SMTP id n2so2957224pgp.11; Sat, 08 Jun 2019 14:33:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=asTTb+baUiXyfqNTosMs5RO/0ojfRs1BQxAtcDHt+gY=; b=GqzSKWWvpdTfSqZBAbm+RTutwgOcea3bnqvaH8vVgrPHFK4WGkXRREpVsQaA1OEPWG OkW1mEP5rVyIg4JHA9tvVW2E9ay/MIHHIUDtOJt6v/ZYsnT6G46QXvS5GLVM3rccpE3R dHYfpcrfVm2ZqaucX8wWvSm4/oAH64Curt5kT5RHcB8Zg+EIIBYuN3hvKkP34i9VSr3M 6aI1mdU+0KG26QI601moWiBXEMIwPBvbRwrAkMQFZCxCGNLREv4StNpXoWKVKDP7ATVs J9RV1wU1k74qEqkg/RrWHfotQDoGegNQwecS9qnM1GPd+5NyoawMqa0DAQRg089KE6rI 0iKQ== Return-Path: Received: from localhost (g30.211-19-85.ppp.wakwak.ne.jp. [211.19.85.30]) by smtp.gmail.com with ESMTPSA id i6sm2463860pfc.55.2019.06.08.14.32.58 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sat, 08 Jun 2019 14:32:58 -0700 (PDT) From: Stafford Horne To: GDB patches , GNU Binutils Cc: Andrey Bacherov , Nick Clifton , Andrew Burgess , Richard Henderson , Openrisc , Stafford Horne Subject: [PATCH v3 08/11] sim/common: wire up new unordered comparisons Date: Sun, 9 Jun 2019 06:32:24 +0900 Message-Id: <20190608213225.3230-9-shorne@gmail.com> In-Reply-To: <20190608213225.3230-1-shorne@gmail.com> References: <20190608213225.3230-1-shorne@gmail.com> MIME-Version: 1.0 X-IsSubscribed: yes Define and wire up unordered floating point comparison operations for cgen targets. This patch depends on my posted cgen patches[0]. [0] https://www.sourceware.org/ml/cgen/2019-q2/msg00013.html sim/common/ChangeLog: yyyy-mm-dd Stafford Horne * cgen-accfp.c (unorderedsf, unordereddf): New functions. (cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf. * cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf. --- Changes from v2: - new patch sim/common/cgen-accfp.c | 25 +++++++++++++++++++++++++ sim/common/cgen-fpu.h | 2 ++ 2 files changed, 27 insertions(+) diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c index 51f5a29fe2..b898de3935 100644 --- a/sim/common/cgen-accfp.c +++ b/sim/common/cgen-accfp.c @@ -303,6 +303,18 @@ gesf (CGEN_FPU* fpu, SF x, SF y) return sim_fpu_is_ge (&op1, &op2); } +static int +unorderedsf (CGEN_FPU* fpu, SF x, SF y) +{ + sim_fpu op1; + sim_fpu op2; + + sim_fpu_32to (&op1, x); + sim_fpu_32to (&op2, y); + return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2); +} + + static DF fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x) { @@ -703,6 +715,17 @@ gedf (CGEN_FPU* fpu, DF x, DF y) sim_fpu_64to (&op2, y); return sim_fpu_is_ge (&op1, &op2); } + +static int +unordereddf (CGEN_FPU* fpu, DF x, DF y) +{ + sim_fpu op1; + sim_fpu op2; + + sim_fpu_64to (&op1, x); + sim_fpu_64to (&op2, y); + return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2); +} /* Initialize FP_OPS to use accurate library. */ @@ -738,6 +761,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error) o->lesf = lesf; o->gtsf = gtsf; o->gesf = gesf; + o->unorderedsf = unorderedsf; o->adddf = adddf; o->subdf = subdf; @@ -757,6 +781,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error) o->ledf = ledf; o->gtdf = gtdf; o->gedf = gedf; + o->unordereddf = unordereddf; o->fextsfdf = fextsfdf; o->ftruncdfsf = ftruncdfsf; o->floatsisf = floatsisf; diff --git a/sim/common/cgen-fpu.h b/sim/common/cgen-fpu.h index 5f9b55d32e..cc5d3569e1 100644 --- a/sim/common/cgen-fpu.h +++ b/sim/common/cgen-fpu.h @@ -87,6 +87,7 @@ struct cgen_fp_ops { int (*lesf) (CGEN_FPU*, SF, SF); int (*gtsf) (CGEN_FPU*, SF, SF); int (*gesf) (CGEN_FPU*, SF, SF); + int (*unorderedsf) (CGEN_FPU*, SF, SF); /* basic DF ops */ @@ -112,6 +113,7 @@ struct cgen_fp_ops { int (*ledf) (CGEN_FPU*, DF, DF); int (*gtdf) (CGEN_FPU*, DF, DF); int (*gedf) (CGEN_FPU*, DF, DF); + int (*unordereddf) (CGEN_FPU*, DF, DF); /* SF/DF conversion ops */