From patchwork Sat Jun 8 21:32:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stafford Horne X-Patchwork-Id: 33057 Received: (qmail 114024 invoked by alias); 8 Jun 2019 21:32:48 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 113970 invoked by uid 89); 8 Jun 2019 21:32:48 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=1200, HX-Languages-Length:1587, H*r:sk:mail-pg, HX-Received:90a X-HELO: mail-pg1-f178.google.com Received: from mail-pg1-f178.google.com (HELO mail-pg1-f178.google.com) (209.85.215.178) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 08 Jun 2019 21:32:46 +0000 Received: by mail-pg1-f178.google.com with SMTP id q15so781677pgr.1; Sat, 08 Jun 2019 14:32:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ac6y1wD03UY3DeVWSa//4iABBBeljLW/KZZ34rirr/k=; b=knHItD47kpFm8IJOJRNYF0Ohhum2nX4Y53Yyp9T0/o978P8YpMKfmPXGz/02y4tzDL AX0G62/hpEI68ob0mEOqMTnHeug4LteFCYnK1fZ5Utg0SjHfINpOAO8B8c04ZSsjrEDq S3xCa48AZp6MO6aIbzoOUgk6Jh6qDJlFKs3OrutmDMxNnawzHNLNgMQdcktaMKdsP5Sk JWw9lVHj15g9eh3wllTbI2s7Gaf+LP/5ZXjJX+UYcyCqL9OPUUBtlCPUwPMP91DKRI8I Xbt0WX19DQwcx9NrWnzTds3/eXAp1NRg9L49AC/srk4YAAAAWS/iH6cGvcKApz4oyCYX LZOw== Return-Path: Received: from localhost (g30.211-19-85.ppp.wakwak.ne.jp. [211.19.85.30]) by smtp.gmail.com with ESMTPSA id p17sm2824300pjo.1.2019.06.08.14.32.44 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sat, 08 Jun 2019 14:32:44 -0700 (PDT) From: Stafford Horne To: GDB patches , GNU Binutils Cc: Andrey Bacherov , Nick Clifton , Andrew Burgess , Richard Henderson , Openrisc , Stafford Horne Subject: [PATCH v3 03/11] cpu/or1k: Document no branch delay slot architectures and l.adrp Date: Sun, 9 Jun 2019 06:32:19 +0900 Message-Id: <20190608213225.3230-4-shorne@gmail.com> In-Reply-To: <20190608213225.3230-1-shorne@gmail.com> References: <20190608213225.3230-1-shorne@gmail.com> MIME-Version: 1.0 X-IsSubscribed: yes The 'nd' architectures did not mention what the 'nd' stands for. Document that these mean 'no brach delay slot'. cpu/ChangeLog: yyyy-mm-dd Stafford Horne * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a (l-adrp): Improve comment. --- cpu/or1k.cpu | 6 +++--- cpu/or1korbis.cpu | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cpu/or1k.cpu b/cpu/or1k.cpu index e1ae1b8c88..b796862d1b 100644 --- a/cpu/or1k.cpu +++ b/cpu/or1k.cpu @@ -77,7 +77,7 @@ (define-mach (name or32nd) - (comment "Generic OpenRISC 1000 32-bit CPU") + (comment "Generic OpenRISC 1000 32-bit CPU with no branch delay slot") (cpu or1k32bf) (bfd-name "or1knd") ) @@ -92,7 +92,7 @@ ; OpenRISC 1200 - 32-bit or1k CPU implementation (define-model - (name or1200nd) (comment "OpenRISC 1200 model") + (name or1200nd) (comment "OpenRISC 1200 model with no branch delay slot") (attrs NO-DELAY-SLOT) (mach or32nd) (unit u-exec "Execution Unit" () 1 1 () () () ()) @@ -120,7 +120,7 @@ (define-mach (name or64nd) - (comment "Generic OpenRISC 1000 ND 64-bit CPU") + (comment "Generic OpenRISC 1000 ND 64-bit CPU with no branch delay slot") (cpu or1k64bf) (bfd-name "or1k64nd") ) diff --git a/cpu/or1korbis.cpu b/cpu/or1korbis.cpu index 308f37861d..3741d4c8f7 100644 --- a/cpu/or1korbis.cpu +++ b/cpu/or1korbis.cpu @@ -433,7 +433,7 @@ ) ) -(dni l-adrp "adrp reg/disp21" +(dni l-adrp "load pc-relative page address" ((MACH ORBIS-MACHS)) "l.adrp $rD,${disp21}" (+ OPC_ADRP rD disp21)