[V2,6/9] Support for DTrace USDT probes in x86_64 targets.
Commit Message
This patch adds the target-specific code in order to support the
calculation of DTrace probes arguments in x86_64 targets, and also the
enabling and disabling of probes. This is done by implementing the
`dtrace_*' gdbarch handlers.
gdb/ChangeLog:
2014-10-10 Jose E. Marchesi <jose.marchesi@oracle.com>
* amd64-linux-tdep.h: Prototypes for
`amd64_dtrace_parse_probe_argument', `amd64_dtrace_enable_probe',
`amd64_dtrace_disable_probe' and
`gdbarch_dtrace_probe_is_enabled'.
* amd64-linux-tdep.c (amd64_dtrace_parse_probe_argument): New function.
(amd64_dtrace_probe_is_enabled): Likewise.
(amd64_dtrace_enable_probe): Likewise.
(amd64_dtrace_disable_probe): Likewise.
(amd64_linux_init_abi): Register the
`gdbarch_dtrace_probe_argument', `gdbarch_dtrace_enable_probe',
`gdbarch_dtrace_disable_probe' and `gdbarch_dtrace_probe_is_enabled'.
---
gdb/ChangeLog | 14 +++++
gdb/amd64-linux-tdep.c | 158 ++++++++++++++++++++++++++++++++++++++++++++++++
gdb/amd64-linux-tdep.h | 11 ++++
3 files changed, 183 insertions(+)
Comments
> +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
> +{
> + gdb_byte buf[5];
> + read_memory (addr - 3, buf, 5);
> +
> + /* The instruction sequence used in x86_64 machines for a disabled
> + is-enabled probe is:
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: nop => 90
> + nop => 90
> +
Please use read_code when reading code, so that these reads go through
the code cache.
> + /* We use the following instruction sequence for disabling an
> + is-enabled probe:
> +
> + xor %rax, %rax; nop; nop => 48 33 C0 90 90
> +
> + Note that ADDR is offset 3 bytes from the beginning of the
> + sequence. */
> +
> + gdb_byte buf[5];
> +
> + buf[0] = 0x48;
> + buf[1] = 0x33;
> + buf[2] = 0xc0;
> + buf[3] = 0x90;
> + buf[4] = 0x90;
> +
> + write_memory (addr - 3, buf, 5);
These code sequences are duplicated in lots of places.
Writing like this instead is both shorter and less error prone:
const gdb_byte buf[] = { 0x48, 0x33, 0xc0, 0x90, 0x90 };
write_memory (addr - 3, buf, sizeof (buf));
... and IMO eliminates the need to have the sequence duplicated in the
comment above.
Going further, we can make these sequences be globals, like:
/* The instruction sequences used in x86_64 machines for a
disabled is-enabled probe. */
const gdb_byte amd64_dtrace_disabled_probe_sequence_1[] = {
/* xor %rax, %rax */ 0x48, 0x33, 0xc0,
/* ADDR: nop */ 0x90,
/* nop */ 0x90
};
const gdb_byte amd64_dtrace_disabled_probe_sequence_2[] = {
/* xor %rax, %rax */ 0x48, 0x33, 0xc0,
/* ADDR: ret */ 0xc3,
/* nop */ 0x90
};
etc. And then instead of:
> +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
> +{
> + gdb_byte buf[5];
> + read_memory (addr - 3, buf, 5);
> +
> + /* The instruction sequence used in x86_64 machines for a disabled
> + is-enabled probe is:
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: nop => 90
> + nop => 90
> +
> + or
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: ret => c3
> + nop => 90
> +
> + This function returns 1 if the instructions at ADDR do _not_
> + follow any of these patterns.
> +
> + Note that ADDR is offset 3 bytes from the beginning of these
> + sequences. */
> +
> + return !((buf[0] == 0x48) && (buf[1] == 0x33) && (buf[2] == 0xc0) /* xor */
> + && ((buf[3] == 0x90) || (buf[3] == 0xc3)) /* nop | ret */
> + && (buf[4] == 0x90)); /* nop */
> +}
Simply write:
amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
{
gdb_byte buf[5];
read_code (addr - 3, buf, 5);
return (memcmp (buf, amd64_dtrace_disabled_probe_sequence_1) != 0
&& memcmp (buf, amd64_dtrace_disabled_probe_sequence_2) != 0)
}
... etc.
Let the compiler worry about optimizing those memcmps if necessary.
> + static int arg_reg_map[6] =
write:
static const int arg_reg_map[] =
> + {
> + AMD64_RDI_REGNUM, /* Arg 1. */
> + AMD64_RSI_REGNUM, /* Arg 2. */
> + AMD64_RDX_REGNUM, /* Arg 3. */
> + AMD64_RCX_REGNUM, /* Arg 4. */
> + AMD64_R8_REGNUM, /* Arg 5. */
> + AMD64_R9_REGNUM /* Arg 6. */
> + };
+
+ /* DTrace probe arguments can be found on the ABI-defined places for
+ regular arguments at the current PC. The probe abstraction
+ currently supports up to 12 arguments for probes. */
+
+ if (narg < 6)
+ {
I'd suggest putting the arg_reg_map array within this if block.
Thanks,
Pedro Alves
> +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
> +{
> + gdb_byte buf[5];
> + read_memory (addr - 3, buf, 5);
> +
> + /* The instruction sequence used in x86_64 machines for a disabled
> + is-enabled probe is:
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: nop => 90
> + nop => 90
> +
Please use read_code when reading code, so that these reads go through
the code cache.
> + /* We use the following instruction sequence for disabling an
> + is-enabled probe:
> +
> + xor %rax, %rax; nop; nop => 48 33 C0 90 90
> +
> + Note that ADDR is offset 3 bytes from the beginning of the
> + sequence. */
> +
> + gdb_byte buf[5];
> +
> + buf[0] = 0x48;
> + buf[1] = 0x33;
> + buf[2] = 0xc0;
> + buf[3] = 0x90;
> + buf[4] = 0x90;
> +
> + write_memory (addr - 3, buf, 5);
These code sequences are duplicated in lots of places.
Writing like this instead is both shorter and less error prone:
const gdb_byte buf[] = { 0x48, 0x33, 0xc0, 0x90, 0x90 };
write_memory (addr - 3, buf, sizeof (buf));
... and IMO eliminates the need to have the sequence duplicated in the
comment above.
Going further, we can make these sequences be globals, like:
/* The instruction sequences used in x86_64 machines for a
disabled is-enabled probe. */
const gdb_byte amd64_dtrace_disabled_probe_sequence_1[] = {
/* xor %rax, %rax */ 0x48, 0x33, 0xc0,
/* ADDR: nop */ 0x90,
/* nop */ 0x90
};
const gdb_byte amd64_dtrace_disabled_probe_sequence_2[] = {
/* xor %rax, %rax */ 0x48, 0x33, 0xc0,
/* ADDR: ret */ 0xc3,
/* nop */ 0x90
};
etc. And then instead of:
> +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
> +{
> + gdb_byte buf[5];
> + read_memory (addr - 3, buf, 5);
> +
> + /* The instruction sequence used in x86_64 machines for a disabled
> + is-enabled probe is:
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: nop => 90
> + nop => 90
> +
> + or
> +
> + xor %rax, %rax => 48 33 C0
> + ADDR: ret => c3
> + nop => 90
> +
> + This function returns 1 if the instructions at ADDR do _not_
> + follow any of these patterns.
> +
> + Note that ADDR is offset 3 bytes from the beginning of these
> + sequences. */
> +
> + return !((buf[0] == 0x48) && (buf[1] == 0x33) && (buf[2] == 0xc0) /* xor */
> + && ((buf[3] == 0x90) || (buf[3] == 0xc3)) /* nop | ret */
> + && (buf[4] == 0x90)); /* nop */
> +}
Simply write:
amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
{
gdb_byte buf[5];
read_code (addr - 3, buf, 5);
return (memcmp (buf, amd64_dtrace_disabled_probe_sequence_1) != 0
&& memcmp (buf, amd64_dtrace_disabled_probe_sequence_2) != 0)
}
... etc.
Let the compiler worry about optimizing those memcmps if necessary.
> + static int arg_reg_map[6] =
write:
static const int arg_reg_map[] =
> + {
> + AMD64_RDI_REGNUM, /* Arg 1. */
> + AMD64_RSI_REGNUM, /* Arg 2. */
> + AMD64_RDX_REGNUM, /* Arg 3. */
> + AMD64_RCX_REGNUM, /* Arg 4. */
> + AMD64_R8_REGNUM, /* Arg 5. */
> + AMD64_R9_REGNUM /* Arg 6. */
> + };
+
+ /* DTrace probe arguments can be found on the ABI-defined places for
+ regular arguments at the current PC. The probe abstraction
+ currently supports up to 12 arguments for probes. */
+
+ if (narg < 6)
+ {
I'd suggest putting the arg_reg_map array within this if block.
Thanks,
Pedro Alves
I forgot:
On 10/10/2014 06:22 PM, Jose E. Marchesi wrote:
> 2014-10-10 Jose E. Marchesi <jose.marchesi@oracle.com>
>
> * amd64-linux-tdep.h: Prototypes for
> `amd64_dtrace_parse_probe_argument', `amd64_dtrace_enable_probe',
> `amd64_dtrace_disable_probe' and
> `gdbarch_dtrace_probe_is_enabled'.
Typo: gdbarch_dtrace_probe_is_enabled: gdbarch => amd64_dtrace.
Write it like this:
* amd64-linux-tdep.h (amd64_dtrace_parse_probe_argument)
(amd64_dtrace_enable_probe, amd64_dtrace_disable_probe)
(amd64_dtrace_probe_is_enabled): New declarations.
But, I don't see why these functions are extern, they're defined
and used in the same file. So make them static and don't touch
amd64-linux-tdep.h.
OTOH, does DTrace on Solaris use this exact same sequences?
If so, then better put these new functions somewhere
non-Linux-specific instead, like e.g., amd64-tdep.c.
> * amd64-linux-tdep.c (amd64_dtrace_parse_probe_argument): New function.
> (amd64_dtrace_probe_is_enabled): Likewise.
> (amd64_dtrace_enable_probe): Likewise.
> (amd64_dtrace_disable_probe): Likewise.
> (amd64_linux_init_abi): Register the
> `gdbarch_dtrace_probe_argument', `gdbarch_dtrace_enable_probe',
> `gdbarch_dtrace_disable_probe' and `gdbarch_dtrace_probe_is_enabled'.
Register the ... _hooks_?
Thanks,
Pedro Alves
@@ -28,6 +28,8 @@
#include "gdbtypes.h"
#include "reggroups.h"
#include "regset.h"
+#include "parser-defs.h"
+#include "user-regs.h"
#include "amd64-linux-tdep.h"
#include "i386-linux-tdep.h"
#include "linux-tdep.h"
@@ -1643,6 +1645,156 @@ amd64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
&amd64_linux_xstateregset, "XSAVE extended state", cb_data);
}
+/* Implementation of `gdbarch_dtrace_probe_is_enabled', as defined in
+ gdbarch.h. */
+
+int
+amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr)
+{
+ gdb_byte buf[5];
+ read_memory (addr - 3, buf, 5);
+
+ /* The instruction sequence used in x86_64 machines for a disabled
+ is-enabled probe is:
+
+ xor %rax, %rax => 48 33 C0
+ ADDR: nop => 90
+ nop => 90
+
+ or
+
+ xor %rax, %rax => 48 33 C0
+ ADDR: ret => c3
+ nop => 90
+
+ This function returns 1 if the instructions at ADDR do _not_
+ follow any of these patterns.
+
+ Note that ADDR is offset 3 bytes from the beginning of these
+ sequences. */
+
+ return !((buf[0] == 0x48) && (buf[1] == 0x33) && (buf[2] == 0xc0) /* xor */
+ && ((buf[3] == 0x90) || (buf[3] == 0xc3)) /* nop | ret */
+ && (buf[4] == 0x90)); /* nop */
+}
+
+/* Implementation of `gdbarch_dtrace_enable_probe', as defined in
+ gdbarch.h. */
+
+void
+amd64_dtrace_enable_probe (struct gdbarch *gdbarch, CORE_ADDR addr)
+{
+ /* We use the following instruction sequence for enabling an
+ is-enabled probe:
+
+ mov $0x1, %eax => b8 01 00 00 00
+
+ Note also that ADDR is offset 3 bytes from the beginning of the
+ sequence. */
+
+ gdb_byte buf[5];
+
+ buf[0] = 0xb8;
+ buf[1] = 0x01;
+ buf[2] = 0x00;
+ buf[3] = 0x00;
+ buf[4] = 0x00;
+
+ write_memory (addr - 3, buf, 5);
+}
+
+/* Implementation of `gdbarch_dtrace_disable_probe', as defined in
+ gdbarch.h. */
+
+void
+amd64_dtrace_disable_probe (struct gdbarch *gdbarch, CORE_ADDR addr)
+{
+ /* We use the following instruction sequence for disabling an
+ is-enabled probe:
+
+ xor %rax, %rax; nop; nop => 48 33 C0 90 90
+
+ Note that ADDR is offset 3 bytes from the beginning of the
+ sequence. */
+
+ gdb_byte buf[5];
+
+ buf[0] = 0x48;
+ buf[1] = 0x33;
+ buf[2] = 0xc0;
+ buf[3] = 0x90;
+ buf[4] = 0x90;
+
+ write_memory (addr - 3, buf, 5);
+}
+
+/* Implementation of `gdbarch_dtrace_parse_probe_argument', as defined
+ in gdbarch.h. */
+
+void
+amd64_dtrace_parse_probe_argument (struct gdbarch *gdbarch,
+ struct parser_state *pstate,
+ int narg)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct frame_info *this_frame = get_selected_frame (NULL);
+ struct stoken str;
+ static int arg_reg_map[6] =
+ {
+ AMD64_RDI_REGNUM, /* Arg 1. */
+ AMD64_RSI_REGNUM, /* Arg 2. */
+ AMD64_RDX_REGNUM, /* Arg 3. */
+ AMD64_RCX_REGNUM, /* Arg 4. */
+ AMD64_R8_REGNUM, /* Arg 5. */
+ AMD64_R9_REGNUM /* Arg 6. */
+ };
+
+ /* DTrace probe arguments can be found on the ABI-defined places for
+ regular arguments at the current PC. The probe abstraction
+ currently supports up to 12 arguments for probes. */
+
+ if (narg < 6)
+ {
+ int regno = arg_reg_map[narg];
+ const char *regname = user_reg_map_regnum_to_name (gdbarch, regno);
+
+ write_exp_elt_opcode (pstate, OP_REGISTER);
+ str.ptr = regname;
+ str.length = strlen (regname);
+ write_exp_string (pstate, str);
+ write_exp_elt_opcode (pstate, OP_REGISTER);
+ }
+ else
+ {
+ /* Additional arguments are passed on the stack. */
+ CORE_ADDR sp;
+ const char *regname = user_reg_map_regnum_to_name (gdbarch, AMD64_RSP_REGNUM);
+
+ /* Displacement. */
+ write_exp_elt_opcode (pstate, OP_LONG);
+ write_exp_elt_type (pstate, builtin_type (gdbarch)->builtin_long);
+ write_exp_elt_longcst (pstate, narg - 6);
+ write_exp_elt_opcode (pstate, OP_LONG);
+
+ /* Register: SP. */
+ write_exp_elt_opcode (pstate, OP_REGISTER);
+ str.ptr = regname;
+ str.length = strlen (regname);
+ write_exp_string (pstate, str);
+ write_exp_elt_opcode (pstate, OP_REGISTER);
+
+ write_exp_elt_opcode (pstate, BINOP_ADD);
+
+ /* Cast to long. */
+ write_exp_elt_opcode (pstate, UNOP_CAST);
+ write_exp_elt_type (pstate,
+ lookup_pointer_type (builtin_type (gdbarch)->builtin_long));
+ write_exp_elt_opcode (pstate, UNOP_CAST);
+
+ write_exp_elt_opcode (pstate, UNOP_IND);
+ }
+}
+
static void
amd64_linux_init_abi_common(struct gdbarch_info info, struct gdbarch *gdbarch)
{
@@ -1907,6 +2059,12 @@ amd64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
/* GNU/Linux uses SVR4-style shared libraries. */
set_solib_svr4_fetch_link_map_offsets
(gdbarch, svr4_lp64_fetch_link_map_offsets);
+
+ /* Register DTrace handlers. */
+ set_gdbarch_dtrace_parse_probe_argument (gdbarch, amd64_dtrace_parse_probe_argument);
+ set_gdbarch_dtrace_probe_is_enabled (gdbarch, amd64_dtrace_probe_is_enabled);
+ set_gdbarch_dtrace_enable_probe (gdbarch, amd64_dtrace_enable_probe);
+ set_gdbarch_dtrace_disable_probe (gdbarch, amd64_dtrace_disable_probe);
}
static void
@@ -594,4 +594,15 @@ enum amd64_x32_syscall {
amd64_x32_sys_getsockopt = (amd64_x32_syscall_bit + 542),
};
+/* DTrace related functions. */
+
+extern void amd64_dtrace_parse_probe_argument (struct gdbarch *gdbarch,
+ struct parser_state *pstate,
+ int narg);
+
+extern int amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr);
+
+extern void amd64_dtrace_enable_probe (struct gdbarch *gdbarch, CORE_ADDR addr);
+extern void amd64_dtrace_disable_probe (struct gdbarch *gdbarch, CORE_ADDR addr);
+
#endif /* amd64-linux-tdep.h */