From patchwork Tue Dec 25 16:37:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 30836 Received: (qmail 18638 invoked by alias); 25 Dec 2018 16:37:50 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 18625 invoked by uid 89); 25 Dec 2018 16:37:49 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY autolearn=ham version=3.3.2 spammy=HCc:D*net, HContent-Transfer-Encoding:8bit X-HELO: hall.aurel32.net From: Aurelien Jarno To: libc-alpha@sourceware.org Cc: Aurelien Jarno Subject: [PATCH v2] ARM: fix kernel assisted atomics with GCC 8 (bug 24034) Date: Tue, 25 Dec 2018 17:37:40 +0100 Message-Id: <20181225163740.28835-1-aurelien@aurel32.net> MIME-Version: 1.0 The pre-ARMv7 CPUs are missing atomic compare and exchange and/or barrier instructions. Therefore those are implemented using kernel assistance, calling a kernel function at a specific address, and passing the arguments in the r0 to r4 registers. This is done by specifying registers for local variables. The a_ptr variable is placed in the r2 register and declared with __typeof (mem). According to the GCC documentation on local register variables, if mem is a constant pointer, the compiler may substitute the variable with its initializer in asm statements, which may cause the corresponding operand to appear in a different register. This happens in __libc_start_main with the pointer to the thread counter for static binaries (but not the shared ones): # ifdef SHARED unsigned int *ptr = __libc_pthread_functions.ptr_nthreads; # ifdef PTR_DEMANGLE PTR_DEMANGLE (ptr); # endif # else extern unsigned int __nptl_nthreads __attribute ((weak)); unsigned int *const ptr = &__nptl_nthreads; # endif This causes static binaries using threads to crash when the GNU libc is built with GCC 8 and most notably tst-cancel21-static. To fix that, use the same trick than for the volatile qualifier, defining a_ptr as a union. Changelog: [BZ #24034] * sysdeps/unix/sysv/linux/arm/atomic-machine.h (__arm_assisted_compare_and_exchange_val_32_acq): Use uint32_t rather than __typeof (...) for the a_ptr variable. --- ChangeLog | 7 +++++++ sysdeps/unix/sysv/linux/arm/atomic-machine.h | 18 +++++++++++++----- 2 files changed, 20 insertions(+), 5 deletions(-) v1 -> v2: Added BZ number. No code change. diff --git a/ChangeLog b/ChangeLog index 881808dead..01389375b1 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,10 @@ +2018-12-23 Aurelien Jarno + + [BZ #24034] + * sysdeps/unix/sysv/linux/arm/atomic-machine.h + (__arm_assisted_compare_and_exchange_val_32_acq): Use uint32_t rather + than __typeof (...) for the a_ptr variable. + 2018-12-21 Joseph Myers [BZ #24023] diff --git a/sysdeps/unix/sysv/linux/arm/atomic-machine.h b/sysdeps/unix/sysv/linux/arm/atomic-machine.h index ad165274d8..a5d244e65e 100644 --- a/sysdeps/unix/sysv/linux/arm/atomic-machine.h +++ b/sysdeps/unix/sysv/linux/arm/atomic-machine.h @@ -49,16 +49,23 @@ declarations of A_OLDVAL et al because when NEWVAL or OLDVAL is of the form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has a 'volatile ...' type and this triggers -Wvolatile-register-var to - complain about 'register volatile ... asm ("reg")'. */ + complain about 'register volatile ... asm ("reg")'. + + We use the same union trick in the declaration of A_PTR because when + MEM is of the from *PTR and PTR has a 'const ... *' type, then __typeof + (*PTR) has a 'const ...' type and this enables the compiler to substitute + the variable with its initializer in asm statements, which may cause the + corresponding operand to appear in a different register. */ #ifdef __thumb2__ /* Thumb-2 has ldrex/strex. However it does not have barrier instructions, so we still need to use the kernel helper. */ # define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ + ({ union { __typeof (mem) a; uint32_t v; } mem_arg = { .a = (mem) }; \ + union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\ register uint32_t a_oldval asm ("r0"); \ register uint32_t a_newval asm ("r1") = newval_arg.v; \ - register __typeof (mem) a_ptr asm ("r2") = (mem); \ + register uint32_t a_ptr asm ("r2") = mem_arg.v; \ register uint32_t a_tmp asm ("r3"); \ register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \ __asm__ __volatile__ \ @@ -79,11 +86,12 @@ (__typeof (oldval)) a_tmp; }) #else # define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ + ({ union { __typeof (mem) a; uint32_t v; } mem_arg = { .a = (mem) }; \ + union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\ union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\ register uint32_t a_oldval asm ("r0"); \ register uint32_t a_newval asm ("r1") = newval_arg.v; \ - register __typeof (mem) a_ptr asm ("r2") = (mem); \ + register uint32_t a_ptr asm ("r2") = mem_arg.v; \ register uint32_t a_tmp asm ("r3"); \ register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \ __asm__ __volatile__ \