[PowerPC] Document requirements for VSX feature
Commit Message
As suggested in
https://sourceware.org/ml/gdb-patches/2018-10/msg00510.html, this
patch changes the documentation for the VSX tdesc feature to make it
clear that the altivec and FPU features are requirements.
gdb/doc/ChangeLog:
YYYY-MM-DD Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo: Document the altivec and fpu requirements for
the org.gnu.gdb.power.vsx feature.
---
gdb/doc/gdb.texinfo | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
Comments
> From: Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
> Cc: uweigand@de.ibm.com
> Date: Thu, 8 Nov 2018 11:10:41 -0200
>
> As suggested in
> https://sourceware.org/ml/gdb-patches/2018-10/msg00510.html, this
> patch changes the documentation for the VSX tdesc feature to make it
> clear that the altivec and FPU features are requirements.
>
> gdb/doc/ChangeLog:
> YYYY-MM-DD Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
>
> * gdb.texinfo: Document the altivec and fpu requirements for
> the org.gnu.gdb.power.vsx feature.
The only change is the last sentence, right?
The change is okay, but please include the name of the node in the
ChangeLog entry (in parentheses, as if it were the name of a
function).
Thanks.
Eli Zaretskii <eliz@gnu.org> writes:
> The only change is the last sentence, right?
I did also change "vector registers" to "vector-scalar registers" which
is the proper name for them. Sorry for the confusing diff, I
auto-formatted the paragraph.
> The change is okay, but please include the name of the node in the
> ChangeLog entry (in parentheses, as if it were the name of a
> function).
Ok! I'll change it to "* gdb.texinfo (PowerPC Features):"
> Thanks.
Thank you!
Checked in. Thanks!
--
Pedro Franco de Carvalho
@@ -43230,11 +43230,13 @@ contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
and @samp{vrsave}.
The @samp{org.gnu.gdb.power.vsx} feature is optional. It should
-contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN}
-will combine these registers with the floating point registers
-(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
-through @samp{vr31}) to present the 128-bit wide registers @samp{vs0}
-through @samp{vs63}, the set of vector registers for POWER7.
+contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN} will
+combine these registers with the floating point registers (@samp{f0}
+through @samp{f31}) and the altivec registers (@samp{vr0} through
+@samp{vr31}) to present the 128-bit wide registers @samp{vs0} through
+@samp{vs63}, the set of vector-scalar registers for POWER7.
+Therefore, this feature requires both @samp{org.gnu.gdb.power.fpu} and
+@samp{org.gnu.gdb.power.altivec}.
The @samp{org.gnu.gdb.power.spe} feature is optional. It should
contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and