From patchwork Tue Oct 2 19:20:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Marchi X-Patchwork-Id: 29622 Received: (qmail 7149 invoked by alias); 2 Oct 2018 19:20:55 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 7097 invoked by uid 89); 2 Oct 2018 19:20:54 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, MIME_BASE64_BLANKS, SPF_PASS autolearn=ham version=3.3.2 spammy=250918 X-HELO: sessmg23.ericsson.net Received: from sessmg23.ericsson.net (HELO sessmg23.ericsson.net) (193.180.251.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 02 Oct 2018 19:20:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; d=ericsson.com; s=mailgw201801; c=relaxed/simple; q=dns/txt; i=@ericsson.com; t=1538508049; h=From:Sender:Reply-To:Subject:Date:Message-ID:To:CC:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Z2Ep7MADFQgBVXazla73vTn2CSNyE6OwFJsyvVcsYRs=; b=NFSmV56naxpzgNl/oQOvXY+UM3JjJG8rk2GYShhmETzNb0X6y6m8k9Wa4NeXfdP8 Wylv9KW6qF24PuxZEBU4Xvpbb8Eu6g0Cw4TuIDitijg7f7h7on1vOlzJaZ2mNFJG P8K0fHxegmrt9KJQldzfxRbjl7quz2pobnw2fHBivKc=; Received: from ESESSMB501.ericsson.se (Unknown_Domain [153.88.183.119]) by sessmg23.ericsson.net (Symantec Mail Security) with SMTP id A9.38.22015.115C3BB5; Tue, 2 Oct 2018 21:20:49 +0200 (CEST) Received: from ESESBMB504.ericsson.se (153.88.183.171) by ESESSMB501.ericsson.se (153.88.183.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 2 Oct 2018 21:20:44 +0200 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (153.88.183.157) by ESESBMB504.ericsson.se (153.88.183.171) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3 via Frontend Transport; Tue, 2 Oct 2018 21:20:43 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ericsson.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Z2Ep7MADFQgBVXazla73vTn2CSNyE6OwFJsyvVcsYRs=; b=kX9Ky+a0XvOqoGSZ6wut/NPwjXMDyGNkhr7BijjKArynoP1ygO5GzNUZYYpCf2Hsn/Mx8TlWTI2YH1qKhWuPMOx7YrlffLmVunc2wUMVerc+BY9s+syy+o8jaIB/v7EYzMUZqn+n6KG0mq0o4BjDnRrUZAcO6t9jSGX9WaCcrMU= Received: from BYAPR15MB2390.namprd15.prod.outlook.com (52.135.198.30) by BYAPR15MB2376.namprd15.prod.outlook.com (52.135.198.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1164.25; Tue, 2 Oct 2018 19:20:41 +0000 Received: from BYAPR15MB2390.namprd15.prod.outlook.com ([fe80::619e:2dbd:180c:a2fb]) by BYAPR15MB2390.namprd15.prod.outlook.com ([fe80::619e:2dbd:180c:a2fb%4]) with mapi id 15.20.1185.024; Tue, 2 Oct 2018 19:20:41 +0000 From: Simon Marchi To: Jan Beulich , Simon Marchi CC: "tim.wiederhake@intel.com" , GDB , "Metzger, Markus T" Subject: Re: [PATCH] x86-64: fix ZMM register state tracking Date: Tue, 2 Oct 2018 19:20:41 +0000 Message-ID: <580ba4ea-93ae-ffd0-7bce-bd1f75cf9ff9@ericsson.com> References: <5B8FD8B302000078001E5940@prv1-mh.provo.novell.com> <369f9b84-77e3-3fa4-f363-a89ee503cff4@ericsson.com> <5B960E3D020000780013C85E@prv1-mh.provo.novell.com> <5BA0FFB102000078001E97B0@prv1-mh.provo.novell.com> <0e0d9f23-2cbf-eb5a-64fa-6cda3392053a@ericsson.com> <5BAA4E7302000078001EBC73@prv1-mh.provo.novell.com> In-Reply-To: <5BAA4E7302000078001EBC73@prv1-mh.provo.novell.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=simon.marchi@ericsson.com; received-spf: None (protection.outlook.com: ericsson.com does not designate permitted sender hosts) Content-ID: MIME-Version: 1.0 Return-Path: simon.marchi@ericsson.com X-IsSubscribed: yes On 2018-09-25 11:04 AM, Jan Beulich wrote: >>>> On 25.09.18 at 05:28, wrote: >> On 2018-09-18 09:37 AM, Jan Beulich wrote: >> Thanks for the instructions. There is already a test covering AVX512 >> instructions, so I figured I would add it there. However, I don't >> have a processor that supports AVX512, so I'm unable to run the test. >> >> Here's a patch, can you try to confirm that the test fails without the >> fix and passes with the fix? I probably screwed up somewhere, but it >> should be pretty close. > > There are two issues here: First of all, unrelated to this patch, the > construct around line 95 in i386-avx512.exp should look like > > if [is_amd64_regs_target] { > set nr_regs 32 > } else { > set nr_regs 8 > } > > Of course this also affects other tests in here, but without this correction > the loop you add does nothing at all. Thanks, this has now been fixed in master. > And then that very loop and the i386-avx512.c addition are not in sync, > and I'm not sure which way you meant it to be: Either in the C file all 16 > upper ZMM registers need to be set identically (not just ZMM16), or > there should be no loop. Woops. Testing only zmm0 and zmm16 will be enough I think. > Furthermore I think the C code addition and hence the test will need to > be x86-64-specific, as registers ZMM8 and higher are inaccessible in > 32-bit mode. Good point. Here's the revised version with this fixed. I am not sure about the output for zmm0 though. From cd9f3e298a3a516298d3fea15ba80b3eaa33cc7c Mon Sep 17 00:00:00 2001 From: Simon Marchi Date: Mon, 24 Sep 2018 23:28:28 -0400 Subject: [PATCH] AVX512 test --- gdb/testsuite/gdb.arch/i386-avx512.c | 7 +++++++ gdb/testsuite/gdb.arch/i386-avx512.exp | 10 ++++++++++ 2 files changed, 17 insertions(+) -- 2.19.0 diff --git a/gdb/testsuite/gdb.arch/i386-avx512.c b/gdb/testsuite/gdb.arch/i386-avx512.c index 9349f09d62e..7d088ed0343 100644 --- a/gdb/testsuite/gdb.arch/i386-avx512.c +++ b/gdb/testsuite/gdb.arch/i386-avx512.c @@ -249,6 +249,13 @@ main (int argc, char **argv) move back to array and check values. */ move_zmm_data_to_memory (); asm ("nop"); /* sixth breakpoint here */ + + asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm0"); +#ifdef __x86_64__s + asm ("vpternlogd $0xff, %zmm0, %zmm0, %zmm16"); +#endif + asm ("vzeroupper"); + asm ("nop"); /* seventh breakpoint here */ } return 0; diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp b/gdb/testsuite/gdb.arch/i386-avx512.exp index cd15e05fd03..43fde12f257 100644 --- a/gdb/testsuite/gdb.arch/i386-avx512.exp +++ b/gdb/testsuite/gdb.arch/i386-avx512.exp @@ -174,3 +174,13 @@ for { set r 0 } { $r < $nr_regs } { incr r } { ".. = \\{f = \\{[expr $r + 30], [expr $r.125 + 30], [expr $r.25 + 20], [expr $r.375 + 20], [expr $r.5 + 10], [expr $r.625 + 10], [expr $r.75 + 10], [expr $r.875 + 10]\\}\\}.*" \ "check contents of zmm_data\[$r\] after writing XMM regs" } + +gdb_test "break [gdb_get_line_number "seventh breakpoint here"]" \ + "Breakpoint .* at .*i386-avx512.c.*" \ + "set seventh breakpoint in main" +gdb_continue_to_breakpoint "continue to seventh breakpoint in main" +gdb_test "print \$zmm0.v16_int32" "= {-1, -1, -1, -1, 0 }" + +if { $nr_regs >= 16 } { + gdb_test "print \$zmm16.v16_int32" "= {-1 }" +}