From patchwork Thu Sep 27 20:49:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?0JrQvtC80L/QsNC9LCDQktGP0YfQtdGB0LvQsNCyINCe0LvQtdCz0L7QstC40Yc=?= X-Patchwork-Id: 29566 Received: (qmail 43470 invoked by alias); 27 Sep 2018 20:49:41 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 43319 invoked by uid 89); 27 Sep 2018 20:49:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, FROM_EXCESS_BASE64, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy=sim X-HELO: mail-oi1-f196.google.com Received: from mail-oi1-f196.google.com (HELO mail-oi1-f196.google.com) (209.85.167.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Sep 2018 20:49:26 +0000 Received: by mail-oi1-f196.google.com with SMTP id k64-v6so3388342oia.13 for ; Thu, 27 Sep 2018 13:49:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=phystech-edu.20150623.gappssmtp.com; s=20150623; h=mime-version:from:date:message-id:subject:to; bh=KjEYiRyF3DC/8Bw31msTf/ER9zMau5S6XGkqOG9g88Y=; b=avnsYbZIuqzeARyQMFDmWhfgukhWJLL3X3Wk2WmQssu5bgxyZwO8ScpEUxfdmNqgFO zMvH4kua4JkwxVsXa3luxBMCgVsBqrkx6iYuhC20z60sJf9Jhae6Xi4X+K/3+UoU+KHM m4S1g/pPNW5gDK41F71cjo+63wvjGQ3XN6KxrfgIC4zBkz/nYC9wN/Jgj1nFOBwLuQg4 Wdu8kyvjrsbbOhP50OHe2yWK4bxaWzHln6dgNv2JbgRMe+TLCKlh1Jo6sepOaR2X6/by r3gb0u+nEeILwjanCGKO8d1Ngwi/W6ce76Y+aNKORg2aeVW+O+HkH1QeU+FyjdnCe0Ms UFDA== MIME-Version: 1.0 From: =?UTF-8?B?0JrQvtC80L/QsNC9LCDQktGP0YfQtdGB0LvQsNCyINCe0LvQtdCz0L7QstC40Yc=?= Date: Thu, 27 Sep 2018 23:49:14 +0300 Message-ID: Subject: [PATCH] Change "xor" name in cpu_core to allow building with iso646.h or C++ compiler To: gdb-patches@sourceware.org X-IsSubscribed: yes This code was introduced back in 1998, and C99 appeared next year, defining the `xor` as an 'alternative keyword' if iso646.h is included. Moreover, C++98 defines it on the language level. As a result, the code is not buildable with C++ compiler or if iso646.h is included beforehand. According to comment, `sim_cpu_core` is mostly a clone of `sim_core`, so I renamed it to `byte_xor` as it's called in `sim_core`. sim/common/ChangeLog: * sim-core.h (sim_cpu_core): Rename cpu_core.xor to cpu_core.byte_xor. * sim-core.c (sim_core_set_xor): Likewise. (sim_core_xor_read_buffer): Likewise. (sim_core_xor_write_buffer): Likewise. diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c index f26a374bb3..5247097102 100644 --- a/sim/common/sim-core.c +++ b/sim/common/sim-core.c @@ -587,7 +587,7 @@ sim_core_set_xor (SIM_DESC sd, mask = 0; while (i - 1 < WITH_XOR_ENDIAN) { - cpu_core->xor[i-1] = mask; + cpu_core->byte_xor[i-1] = mask; mask = (mask << 1) & (WITH_XOR_ENDIAN - 1); i = (i << 1); } @@ -634,7 +634,7 @@ sim_core_xor_read_buffer (SIM_DESC sd, address_word addr, unsigned nr_bytes) { - address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]); + address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->byte_xor[0]); if (!WITH_XOR_ENDIAN || !byte_xor) return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes); else @@ -686,7 +686,7 @@ sim_core_xor_write_buffer (SIM_DESC sd, address_word addr, unsigned nr_bytes) { - address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]); + address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->byte_xor[0]); if (!WITH_XOR_ENDIAN || !byte_xor) return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes); else diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h index ccfe48fba6..305d1564b3 100644 --- a/sim/common/sim-core.h +++ b/sim/common/sim-core.h @@ -89,7 +89,7 @@ struct _sim_core { typedef struct _sim_cpu_core { sim_core_common common; - address_word xor[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */ + address_word byte_xor[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */ } sim_cpu_core;