diff mbox

[OBV/Pushed] Fix asm in testsuite/gdb.arch/aarch64-fp.c

Message ID A1B2FCA9-187E-4A7F-9C35-3E2CCE3CB4E7@arm.com
State New, archived
Headers

Commit Message

Alan Hayward Aug. 17, 2018, 10:11 a.m. UTC 
  Pushed as obvious. Getting rid of an old minor bug...


Cannot assume result of first and third ldr will go into x0.
Rewrite asm to be clearer.

gdb/testsuite/Changelog

2018-08-17  Alan Hayward  <alan.hayward@arm.com>

	PR gdb/18931:
	* gdb.arch/aarch64-fp.c (main): Fix asm registers.
diff mbox

Patch

diff --git a/gdb/testsuite/gdb.arch/aarch64-fp.c b/gdb/testsuite/gdb.arch/aarch64-fp.c
index 0ff8e00bbd38281863ff56af040d1de352c6236a..7eb6df2a0401f2af71633312aa8ef620f643daf4 100644
--- a/gdb/testsuite/gdb.arch/aarch64-fp.c
+++ b/gdb/testsuite/gdb.arch/aarch64-fp.c
@@ -26,12 +26,18 @@  main (void)
   void *addr;

   addr = &buf0[0];
-  __asm __volatile ("ldr %x0, [%1]" : "=r" (val) : "r" (&addr));
-  __asm __volatile ("ldr q0, [x0]");
-
+  __asm __volatile ("ldr %x0, [%1]\n\t"
+		    "ldr q0, [%x0]"
+		    : "=r" (val)
+		    : "r" (&addr)
+		    : "q0" );
+
   addr = &buf1[0];
-  __asm __volatile ("ldr %x0, [%1]" : "=r" (val) : "r" (&addr));
-  __asm __volatile ("ldr q1, [x0]");
+  __asm __volatile ("ldr %x0, [%1]\n\t"
+		    "ldr q1, [%x0]"
+		    : "=r" (val)
+		    : "r" (&addr)
+		    : "q1" );

   return 1;
 }