From patchwork Wed Jun 6 15:16:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 27663 Received: (qmail 102559 invoked by alias); 6 Jun 2018 15:17:14 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 102457 invoked by uid 89); 6 Jun 2018 15:17:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: EUR02-HE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr10087.outbound.protection.outlook.com (HELO EUR02-HE1-obe.outbound.protection.outlook.com) (40.107.1.87) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 06 Jun 2018 15:17:11 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; Received: from C02TF0U7HF1T.arm.com (217.140.96.140) by AM4PR0802MB2132.eurprd08.prod.outlook.com (2603:10a6:200:5c::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.841.14; Wed, 6 Jun 2018 15:16:53 +0000 From: Alan Hayward To: gdb-patches@sourceware.org Cc: nd@arm.com, Alan Hayward Subject: [PATCH v2 06/10] Add Aarch64 SVE dwarf regnums Date: Wed, 6 Jun 2018 16:16:25 +0100 Message-Id: <20180606151629.36602-7-alan.hayward@arm.com> In-Reply-To: <20180606151629.36602-1-alan.hayward@arm.com> References: <20180606151629.36602-1-alan.hayward@arm.com> MIME-Version: 1.0 X-ClientProxiedBy: CWLP265CA0083.GBRP265.PROD.OUTLOOK.COM (2603:10a6:401:50::23) To AM4PR0802MB2132.eurprd08.prod.outlook.com (2603:10a6:200:5c::23) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-TrafficTypeDiagnostic: AM4PR0802MB2132: NoDisclaimer: True X-Exchange-Antispam-Report-Test: UriScan:(180628864354917); X-MS-Exchange-SenderADCheck: 1 X-Forefront-PRVS: 06952FC175 Received-SPF: None (protection.outlook.com: arm.com does not designate permitted sender hosts) SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Office365-Filtering-Correlation-Id: 08fdb179-ad43-42bc-6fba-08d5cbc08935 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jun 2018 15:16:53.5964 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 08fdb179-ad43-42bc-6fba-08d5cbc08935 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0802MB2132 X-IsSubscribed: yes Simply add the Dwarf VG register checks. This is as per the spec: https://developer.arm.com/products/architecture/a-profile/docs/100985/0000 2018-06-06 Alan Hayward * aarch64-tdep.c (aarch64_dwarf_reg_to_regnum): Add mappings. * aarch64-tdep.h (AARCH64_DWARF_SVE_VG): Add define. (AARCH64_DWARF_SVE_FFR): Likewise. (AARCH64_DWARF_SVE_P0): Likewise. (AARCH64_DWARF_SVE_Z0): Likewise. --- gdb/aarch64-tdep.c | 13 ++++++++++++- gdb/aarch64-tdep.h | 4 ++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 0438ab83cd..cfe22213cd 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -1806,9 +1806,20 @@ aarch64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) if (reg >= AARCH64_DWARF_V0 && reg <= AARCH64_DWARF_V0 + 31) return AARCH64_V0_REGNUM + reg - AARCH64_DWARF_V0; + if (reg == AARCH64_DWARF_SVE_VG) + return AARCH64_SVE_VG_REGNUM; + + if (reg == AARCH64_DWARF_SVE_FFR) + return AARCH64_SVE_FFR_REGNUM; + + if (reg >= AARCH64_DWARF_SVE_P0 && reg <= AARCH64_DWARF_SVE_P0 + 15) + return AARCH64_SVE_P0_REGNUM + reg - AARCH64_DWARF_SVE_P0; + + if (reg >= AARCH64_DWARF_SVE_Z0 && reg <= AARCH64_DWARF_SVE_Z0 + 15) + return AARCH64_SVE_Z0_REGNUM + reg - AARCH64_DWARF_SVE_Z0; + return -1; } - /* Implement the "print_insn" gdbarch method. */ diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index 5a319551e6..7e5031f0fd 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -32,6 +32,10 @@ struct regset; #define AARCH64_DWARF_X0 0 #define AARCH64_DWARF_SP 31 #define AARCH64_DWARF_V0 64 +#define AARCH64_DWARF_SVE_VG 46 +#define AARCH64_DWARF_SVE_FFR 47 +#define AARCH64_DWARF_SVE_P0 48 +#define AARCH64_DWARF_SVE_Z0 96 /* Size of integer registers. */ #define X_REGISTER_SIZE 8