Patchwork powerpc: Fix tst-set_ppr.c on 32-bit POWER7

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Submitter Adhemerval Zanella Netto
Date March 6, 2018, 2:45 a.m.
Message ID <e3c90c62-e027-6cdb-c0e3-984a9f8f5443@linaro.org>
Download mbox | patch
Permalink /patch/26203/
State New
Headers show

Comments

Adhemerval Zanella Netto - March 6, 2018, 2:45 a.m.
On 02/03/2018 17:39, Tulio Magno Quites Machado Filho wrote:
> Instruction mfppr32 is categorized as phased-in in the POWER ISA 2.06,
> which means that servers do not implement it.
> It started to be available in POWER ISA 2.07.
> 
> 2018-03-02  Tulio Magno Quites Machado Filho  <tuliom@linux.vnet.ibm.com>
> 
> 	* sysdeps/powerpc/tst-set_ppr.c (do_test): Test for
> 	PPC_FEATURE2_ARCH_2_07 before trying to read the PPR32 on a
> 	POWER7 system.
> 
> Signed-off-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
> ---
>  sysdeps/powerpc/tst-set_ppr.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/sysdeps/powerpc/tst-set_ppr.c b/sysdeps/powerpc/tst-set_ppr.c
> index c4f8096..da8c4cd 100644
> --- a/sysdeps/powerpc/tst-set_ppr.c
> +++ b/sysdeps/powerpc/tst-set_ppr.c
> @@ -73,13 +73,21 @@ static int
>  do_test (void)
>  {
>    /* Check for the minimum required Power ISA to run these tests.  */
> +#ifdef __powerpc64__
>    if ((getauxval (AT_HWCAP) & PPC_FEATURE_ARCH_2_06) == 0)
>      {
>        printf ("Requires an environment that implements the Power ISA version"
>                " 2.06 or greater.\n");
>        return EXIT_UNSUPPORTED;
>      }
> -
> +#else
> +  if ((getauxval (AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07) == 0)
> +    {
> +      printf ("Requires an environment that implements the Power ISA version"
> +              " 2.07 or greater.\n");
> +      return EXIT_UNSUPPORTED;
> +    }
> +#endif
>    uint8_t rc = 0;
>  
>  #ifdef _ARCH_PWR8
> 

Unfortunately similar to tabort. issue I am seeing a build issue with unrecognised
mppfr32 instruction with an e500 toolchain.  I suggest you to add a similar build
condition to avoid such instruction as:

Patch

diff --git a/sysdeps/powerpc/tst-set_ppr.c b/sysdeps/powerpc/tst-set_ppr.c
index c4f8096bf8..4da5335c12 100644
--- a/sysdeps/powerpc/tst-set_ppr.c
+++ b/sysdeps/powerpc/tst-set_ppr.c
@@ -26,13 +26,22 @@ 
 #include <support/test-driver.h>

 #ifdef __powerpc64__
-  typedef uint64_t ppr_t;
-# define MFPPR "mfppr"
-  /* The thread priority value is obtained from bits 11:13.  */
+typedef uint64_t ppr_t;
+# ifdef _ARCH_PWR7
+#  define MFPPR(ppr) asm volatile ("mfppr %0" : "=r"(ppr))
+/* The thread priority value is obtained from bits 11:13.  */
+# else
+#  define MFPPR(ppr) (ppr) = 0
+# endif
 # define EXTRACT_THREAD_PRIORITY(x) ((x >> 50) & 7)
 #else
-  typedef uint32_t ppr_t;
-# define MFPPR "mfppr32"
+typedef uint32_t ppr_t;
+# ifdef _ARCH_PWR8
+#  define MFPPR(ppr) asm volatile ("mfppr32 %0" : "=r"(ppr))
+/* The thread priority value is obtained from bits 11:13.  */
+# else
+#  define MFPPR(ppr) (ppr) = 0
+# endif
   /* For 32-bit, the upper 32 bits of the Program Priority Register (PPR)
      are used, so the thread priority value is obtained from bits 43:46.  */
 # define EXTRACT_THREAD_PRIORITY(x) ((x >> 18) & 7)
@@ -42,10 +51,8 @@ 
 static __inline__ ppr_t
 get_thread_priority (void)
 {
-  /* Read the PPR.  */
   ppr_t ppr;
-  asm volatile (MFPPR" %0" : "=r"(ppr));
-  /* Return the thread priority value.  */
+  MFPPR (ppr);
   return EXTRACT_THREAD_PRIORITY (ppr);
 }