From patchwork Wed Feb 7 10:32:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 25851 Received: (qmail 24060 invoked by alias); 7 Feb 2018 10:33:20 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 23418 invoked by uid 89); 7 Feb 2018 10:33:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wm0-f67.google.com Received: from mail-wm0-f67.google.com (HELO mail-wm0-f67.google.com) (74.125.82.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 07 Feb 2018 10:33:13 +0000 Received: by mail-wm0-f67.google.com with SMTP id 141so2309251wme.3 for ; Wed, 07 Feb 2018 02:33:12 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=RzkqZ4VplRHu5CBOgspzNOVnm3/YSwkyXEx26b+2G4E=; b=bcUo5Pf9dMtKTHP3VJGTd/o4jnHujOp4K/l7Euyl+7z4oC7QBZITHwgkVSwJzx8iTs F6/S/gC6RhFtJfZ7ef+Rb5zLu/EwUO9VXvI9ovdIcAYh8PAdsMWQ6SkwJh7Sb4nQA5q9 3I2algcE582B/Lu52eCm/m55g5SdOPh8LBjzX78ySj+678PDy1wCwWTaqnVrQSXaIF4+ tmMB51jFMeL5ghSYK9EgB4nyZEerXoGsr3Lnjg9sBr5a6rVYHzbCUow9ilGJXBLW+qLZ hHeHmgqR5OZVsago9+yuAHfOZEnk7Z7gpMl+jj2lwoEuLNiTsj2FRaODwfWKjmmTuPrz MrRg== X-Gm-Message-State: APf1xPDiMmLxHesaSnl1GLxPs2VBEVz0/i5VWym6e2VCgsy6k3gWGw6Y N4/LjxjiKMdy3jzzQ6LHbe09KQ== X-Google-Smtp-Source: AH8x2258mnRGtkpXLJ2G4HuLlQf/4WoBf7Eg25JtQsamz6jToiJQaaBNUWiUFJm3AhE30QbOh1p+ww== X-Received: by 10.28.182.5 with SMTP id g5mr4154475wmf.44.1517999590884; Wed, 07 Feb 2018 02:33:10 -0800 (PST) Received: from E107787-LIN.cambridge.arm.com (static.42.136.251.148.clients.your-server.de. [148.251.136.42]) by smtp.gmail.com with ESMTPSA id x135sm1138884wmf.35.2018.02.07.02.33.10 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Feb 2018 02:33:10 -0800 (PST) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 10/10] Pass readable_regcache to gdbarch method read_pc Date: Wed, 7 Feb 2018 10:32:52 +0000 Message-Id: <1517999572-14987-11-git-send-email-yao.qi@linaro.org> In-Reply-To: <1517999572-14987-1-git-send-email-yao.qi@linaro.org> References: <1517999572-14987-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes We can pass readable_regcache to gdbarch method read_pc where it is allowed to do read from regcache. gdb: 2018-01-30 Yao Qi * avr-tdep.c (avr_read_pc): Change parameter type to readable_regcache. * gdbarch.sh (read_pc): Likewise. * gdbarch.c: Re-generated. * gdbarch.h: Re-generated. * hppa-tdep.c (hppa_read_pc): Change parameter type to readable_regcache. * ia64-tdep.c (ia64_read_pc): Likewise. * mips-tdep.c (mips_read_pc): Likewise. * spu-tdep.c (spu_read_pc): Likewise. --- gdb/avr-tdep.c | 5 +++-- gdb/gdbarch.c | 2 +- gdb/gdbarch.h | 4 ++-- gdb/gdbarch.sh | 2 +- gdb/hppa-tdep.c | 6 +++--- gdb/ia64-tdep.c | 6 +++--- gdb/mips-tdep.c | 4 ++-- gdb/spu-tdep.c | 5 +++-- 8 files changed, 18 insertions(+), 16 deletions(-) diff --git a/gdb/avr-tdep.c b/gdb/avr-tdep.c index 7f88e8f..c44a3aa 100644 --- a/gdb/avr-tdep.c +++ b/gdb/avr-tdep.c @@ -367,10 +367,11 @@ avr_integer_to_address (struct gdbarch *gdbarch, } static CORE_ADDR -avr_read_pc (struct regcache *regcache) +avr_read_pc (readable_regcache *regcache) { ULONGEST pc; - regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc); + + regcache->cooked_read (AVR_PC_REGNUM, &pc); return avr_make_iaddr (pc); } diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index 705a6d3..62cb9a5 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -1906,7 +1906,7 @@ gdbarch_read_pc_p (struct gdbarch *gdbarch) } CORE_ADDR -gdbarch_read_pc (struct gdbarch *gdbarch, struct regcache *regcache) +gdbarch_read_pc (struct gdbarch *gdbarch, readable_regcache *regcache) { gdb_assert (gdbarch != NULL); gdb_assert (gdbarch->read_pc != NULL); diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h index 249ad61..30c2bf3 100644 --- a/gdb/gdbarch.h +++ b/gdb/gdbarch.h @@ -245,8 +245,8 @@ extern void set_gdbarch_char_signed (struct gdbarch *gdbarch, int char_signed); extern int gdbarch_read_pc_p (struct gdbarch *gdbarch); -typedef CORE_ADDR (gdbarch_read_pc_ftype) (struct regcache *regcache); -extern CORE_ADDR gdbarch_read_pc (struct gdbarch *gdbarch, struct regcache *regcache); +typedef CORE_ADDR (gdbarch_read_pc_ftype) (readable_regcache *regcache); +extern CORE_ADDR gdbarch_read_pc (struct gdbarch *gdbarch, readable_regcache *regcache); extern void set_gdbarch_read_pc (struct gdbarch *gdbarch, gdbarch_read_pc_ftype *read_pc); extern int gdbarch_write_pc_p (struct gdbarch *gdbarch); diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh index 8477dd7..10a2aa9 100755 --- a/gdb/gdbarch.sh +++ b/gdb/gdbarch.sh @@ -422,7 +422,7 @@ v;int;dwarf2_addr_size;;;sizeof (void*);0;gdbarch_ptr_bit (gdbarch) / TARGET_CHA # One if \`char' acts like \`signed char', zero if \`unsigned char'. v;int;char_signed;;;1;-1;1 # -F;CORE_ADDR;read_pc;struct regcache *regcache;regcache +F;CORE_ADDR;read_pc;readable_regcache *regcache;regcache F;void;write_pc;struct regcache *regcache, CORE_ADDR val;regcache, val # Function for getting target's idea of a frame pointer. FIXME: GDB's # whole scheme for dealing with "frames" and "frame pointers" needs a diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c index cc9434e..84dbd66 100644 --- a/gdb/hppa-tdep.c +++ b/gdb/hppa-tdep.c @@ -1304,13 +1304,13 @@ hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) } CORE_ADDR -hppa_read_pc (struct regcache *regcache) +hppa_read_pc (readable_regcache *regcache) { ULONGEST ipsw; ULONGEST pc; - regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw); - regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc); + regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw); + regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc); /* If the current instruction is nullified, then we are effectively still executing the previous instruction. Pretend we are still diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c index 6c9b341..4f02f05 100644 --- a/gdb/ia64-tdep.c +++ b/gdb/ia64-tdep.c @@ -876,13 +876,13 @@ ia64_breakpoint_from_pc (struct gdbarch *gdbarch, } static CORE_ADDR -ia64_read_pc (struct regcache *regcache) +ia64_read_pc (readable_regcache *regcache) { ULONGEST psr_value, pc_value; int slot_num; - regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value); - regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value); + regcache->cooked_read (IA64_PSR_REGNUM, &psr_value); + regcache->cooked_read (IA64_IP_REGNUM, &pc_value); slot_num = (psr_value >> 41) & 3; return pc_value | (slot_num * SLOT_MULTIPLIER); diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 2c1a8f0..05f27a5 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1362,12 +1362,12 @@ mips_in_frame_stub (CORE_ADDR pc) all registers should be sign extended for simplicity? */ static CORE_ADDR -mips_read_pc (struct regcache *regcache) +mips_read_pc (readable_regcache *regcache) { int regnum = gdbarch_pc_regnum (regcache->arch ()); LONGEST pc; - regcache_cooked_read_signed (regcache, regnum, &pc); + regcache->cooked_read (regnum, &pc); return pc; } diff --git a/gdb/spu-tdep.c b/gdb/spu-tdep.c index a632c06..695b5cc 100644 --- a/gdb/spu-tdep.c +++ b/gdb/spu-tdep.c @@ -1176,11 +1176,12 @@ spu_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) } static CORE_ADDR -spu_read_pc (struct regcache *regcache) +spu_read_pc (readable_regcache *regcache) { struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); ULONGEST pc; - regcache_cooked_read_unsigned (regcache, SPU_PC_REGNUM, &pc); + + regcache->cooked_read (SPU_PC_REGNUM, &pc); /* Mask off interrupt enable bit. */ return SPUADDR (tdep->id, pc & -4); }