diff mbox

[v3,08/19] RISC-V: ABI Implementation

Message ID 20171227060534.3998-9-palmer@dabbelt.com
State New, archived
Headers

Commit Message

Palmer Dabbelt Dec. 27, 2017, 6:05 a.m. UTC 
  This patch contains code that needs to directly know about the RISC-V
ABI, which is specified in a work-in-progress psABI document:

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

This is meant to contain all the RISC-V code that needs to explicitly
name registers or manage in-memory structure layout.  This does not
contain any of the Linux-specific code.
---
 sysdeps/riscv/__longjmp.S     | 57 +++++++++++++++++++++++++++++++
 sysdeps/riscv/bits/endian.h   |  5 +++
 sysdeps/riscv/bits/setjmp.h   | 41 +++++++++++++++++++++++
 sysdeps/riscv/bits/wordsize.h | 31 +++++++++++++++++
 sysdeps/riscv/bsd-_setjmp.c   |  1 +
 sysdeps/riscv/bsd-setjmp.c    |  1 +
 sysdeps/riscv/dl-trampoline.S | 63 ++++++++++++++++++++++++++++++++++
 sysdeps/riscv/gccframe.h      | 21 ++++++++++++
 sysdeps/riscv/jmpbuf-unwind.h | 46 +++++++++++++++++++++++++
 sysdeps/riscv/machine-gmon.h  | 34 +++++++++++++++++++
 sysdeps/riscv/memusage.h      | 21 ++++++++++++
 sysdeps/riscv/setjmp.S        | 74 ++++++++++++++++++++++++++++++++++++++++
 sysdeps/riscv/sys/asm.h       | 78 +++++++++++++++++++++++++++++++++++++++++++
 sysdeps/riscv/tls-macros.h    | 60 +++++++++++++++++++++++++++++++++
 14 files changed, 533 insertions(+)
 create mode 100644 sysdeps/riscv/__longjmp.S
 create mode 100644 sysdeps/riscv/bits/endian.h
 create mode 100644 sysdeps/riscv/bits/setjmp.h
 create mode 100644 sysdeps/riscv/bits/wordsize.h
 create mode 100644 sysdeps/riscv/bsd-_setjmp.c
 create mode 100644 sysdeps/riscv/bsd-setjmp.c
 create mode 100644 sysdeps/riscv/dl-trampoline.S
 create mode 100644 sysdeps/riscv/gccframe.h
 create mode 100644 sysdeps/riscv/jmpbuf-unwind.h
 create mode 100644 sysdeps/riscv/machine-gmon.h
 create mode 100644 sysdeps/riscv/memusage.h
 create mode 100644 sysdeps/riscv/setjmp.S
 create mode 100644 sysdeps/riscv/sys/asm.h
 create mode 100644 sysdeps/riscv/tls-macros.h

Comments

Joseph Myers Jan. 1, 2018, 1:29 p.m. UTC | #1 
On Tue, 26 Dec 2017, Palmer Dabbelt wrote:

> diff --git a/sysdeps/riscv/bits/setjmp.h b/sysdeps/riscv/bits/setjmp.h

> +    /* Callee-saved floating point registers.  */
> +#ifdef __riscv_float_abi_single
> +   float __fpregs[12];

More stray "f" ABI support to remove given that ABI's not being supported.

> diff --git a/sysdeps/riscv/dl-trampoline.S b/sysdeps/riscv/dl-trampoline.S

Your ABI document says that the floating-point ABI passes arguments in 
floating-point registers, and those argument registers are not preserved 
across calls.

This means that (in the hard-float ABI case) _dl_runtime_resolve needs to 
preserve those registers in case the dynamic linker clobbers them.  Even 
if you somehow ensure that no dynamic linker code uses those registers 
(e.g. compile the dynamic linker with -ffixed-* options for them), the 
dynamic linker can call user code (audit modules, interposed malloc, IFUNC 
resolvers - you don't have IFUNC support for RISC-V at present, but the 
other cases still apply).  If such user code, called during symbol 
resolution, were to change those call-clobbered argument registers, that 
would corrupt the floating-point arguments to the function being called.

> diff --git a/sysdeps/riscv/machine-gmon.h b/sysdeps/riscv/machine-gmon.h

> +static void mcount_internal (u_long frompc, u_long selfpc);
> +
> +#define _MCOUNT_DECL(frompc, selfpc) \
> +static inline void mcount_internal (u_long frompc, u_long selfpc)
> +
> +#define MCOUNT								\
> +void _mcount (void *frompc)						\
> +{									\
> +  mcount_internal ((u_long) frompc, (u_long) RETURN_ADDRESS (0));	\

Please use "unsigned long int", not the legacy "u_long" name, in new code.  
(Note that the sys/gmon.h header, which this is probably meant to match, 
now uses "unsigned long" after Zack's installed header cleanups.)

> diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h

> +/* For ABI uniformity, reserve 8 bytes for floats, even if double-precision
> +   floating-point is not supported in hardware.  */
> +# if defined __riscv_float_abi_single

More stray "f" ABI support here.

> +/*
> + * LEAF - declare leaf routine
> + */

Please see my previous comments in 
<https://sourceware.org/ml/libc-alpha/2017-12/msg00742.html> regarding 
proper GNU comment formatting, for this and other macros in this file.
diff mbox

Patch

diff --git a/sysdeps/riscv/__longjmp.S b/sysdeps/riscv/__longjmp.S
new file mode 100644
index 000000000000..e4b7b579d4bb
--- /dev/null
+++ b/sysdeps/riscv/__longjmp.S
@@ -0,0 +1,57 @@ 
+/* longjmp, RISC-V version.
+   Copyright (C) 1996-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <sys/asm.h>
+
+ENTRY (__longjmp)
+	REG_L ra,  0*SZREG(a0)
+	REG_L s0,  1*SZREG(a0)
+	REG_L s1,  2*SZREG(a0)
+	REG_L s2,  3*SZREG(a0)
+	REG_L s3,  4*SZREG(a0)
+	REG_L s4,  5*SZREG(a0)
+	REG_L s5,  6*SZREG(a0)
+	REG_L s6,  7*SZREG(a0)
+	REG_L s7,  8*SZREG(a0)
+	REG_L s8,  9*SZREG(a0)
+	REG_L s9, 10*SZREG(a0)
+	REG_L s10,11*SZREG(a0)
+	REG_L s11,12*SZREG(a0)
+	REG_L sp, 13*SZREG(a0)
+
+#ifndef __riscv_float_abi_soft
+	FREG_L fs0, 14*SZREG+ 0*SZFREG(a0)
+	FREG_L fs1, 14*SZREG+ 1*SZFREG(a0)
+	FREG_L fs2, 14*SZREG+ 2*SZFREG(a0)
+	FREG_L fs3, 14*SZREG+ 3*SZFREG(a0)
+	FREG_L fs4, 14*SZREG+ 4*SZFREG(a0)
+	FREG_L fs5, 14*SZREG+ 5*SZFREG(a0)
+	FREG_L fs6, 14*SZREG+ 6*SZFREG(a0)
+	FREG_L fs7, 14*SZREG+ 7*SZFREG(a0)
+	FREG_L fs8, 14*SZREG+ 8*SZFREG(a0)
+	FREG_L fs9, 14*SZREG+ 9*SZFREG(a0)
+	FREG_L fs10,14*SZREG+10*SZFREG(a0)
+	FREG_L fs11,14*SZREG+11*SZFREG(a0)
+#endif
+
+	seqz a0, a1
+	add  a0, a0, a1   # a0 = (a1 == 0) ? 1 : a1
+	ret
+
+END (__longjmp)
diff --git a/sysdeps/riscv/bits/endian.h b/sysdeps/riscv/bits/endian.h
new file mode 100644
index 000000000000..4aaf559d4f43
--- /dev/null
+++ b/sysdeps/riscv/bits/endian.h
@@ -0,0 +1,5 @@ 
+#ifndef _ENDIAN_H
+# error "Never use <bits/endian.h> directly; include <endian.h> instead."
+#endif
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
diff --git a/sysdeps/riscv/bits/setjmp.h b/sysdeps/riscv/bits/setjmp.h
new file mode 100644
index 000000000000..54a7fb85baab
--- /dev/null
+++ b/sysdeps/riscv/bits/setjmp.h
@@ -0,0 +1,41 @@ 
+/* Define the machine-dependent type `jmp_buf'.  RISC-V version.
+   Copyright (C) 2011-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _RISCV_BITS_SETJMP_H
+#define _RISCV_BITS_SETJMP_H
+
+typedef struct __jmp_buf_internal_tag
+  {
+    /* Program counter.  */
+    long __pc;
+    /* Callee-saved registers. */
+    long __regs[12];
+    /* Stack pointer.  */
+    long __sp;
+
+    /* Callee-saved floating point registers.  */
+#ifdef __riscv_float_abi_single
+   float __fpregs[12];
+#elif defined __riscv_float_abi_double
+   double __fpregs[12];
+#elif !defined __riscv_float_abi_soft
+# error unsupported FLEN
+#endif
+  } __jmp_buf[1];
+
+#endif /* _RISCV_BITS_SETJMP_H */
diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h
new file mode 100644
index 000000000000..4781cc4899a3
--- /dev/null
+++ b/sysdeps/riscv/bits/wordsize.h
@@ -0,0 +1,31 @@ 
+/* Determine the wordsize from the preprocessor defines.  RISC-V version.
+   Copyright (C) 2002-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if __riscv_xlen == (__SIZEOF_POINTER__ * 8)
+# define __WORDSIZE __riscv_xlen
+#else
+# error unsupported ABI
+#endif
+
+#if __riscv_xlen == 64
+# define __WORDSIZE_TIME64_COMPAT32 1
+#else
+# define __WORDSIZE_TIME64_COMPAT32 0
+# define __WORDSIZE32_SIZE_ULONG    0
+# define __WORDSIZE32_PTRDIFF_LONG  0
+#endif
diff --git a/sysdeps/riscv/bsd-_setjmp.c b/sysdeps/riscv/bsd-_setjmp.c
new file mode 100644
index 000000000000..0d413101ce0d
--- /dev/null
+++ b/sysdeps/riscv/bsd-_setjmp.c
@@ -0,0 +1 @@ 
+/* _setjmp is implemented in setjmp.S */
diff --git a/sysdeps/riscv/bsd-setjmp.c b/sysdeps/riscv/bsd-setjmp.c
new file mode 100644
index 000000000000..ee7c5e3437d4
--- /dev/null
+++ b/sysdeps/riscv/bsd-setjmp.c
@@ -0,0 +1 @@ 
+/* setjmp is implemented in setjmp.S */
diff --git a/sysdeps/riscv/dl-trampoline.S b/sysdeps/riscv/dl-trampoline.S
new file mode 100644
index 000000000000..b52dd29ee4de
--- /dev/null
+++ b/sysdeps/riscv/dl-trampoline.S
@@ -0,0 +1,63 @@ 
+/* RISC-V PLT trampoline
+   Copyright (C) 2017 Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <sys/asm.h>
+
+/* Assembler veneer called from the PLT header code for lazy loading.
+   The PLT header passes its own args in t0-t2.  */
+
+#define FRAME_SIZE (-((-10 * SZREG) & ALMASK))
+
+ENTRY (_dl_runtime_resolve)
+  # Save arguments to stack.
+  addi sp, sp, -FRAME_SIZE
+  REG_S ra, 9*SZREG(sp)
+  REG_S a0, 1*SZREG(sp)
+  REG_S a1, 2*SZREG(sp)
+  REG_S a2, 3*SZREG(sp)
+  REG_S a3, 4*SZREG(sp)
+  REG_S a4, 5*SZREG(sp)
+  REG_S a5, 6*SZREG(sp)
+  REG_S a6, 7*SZREG(sp)
+  REG_S a7, 8*SZREG(sp)
+
+  # Update .got.plt and obtain runtime address of callee.
+  slli a1, t1, 1
+  mv a0, t0       # link map
+  add a1, a1, t1  # reloc offset (== thrice the .got.plt offset)
+  la a2, _dl_fixup
+  jalr a2
+  mv t1, a0
+
+  # Restore arguments from stack.
+  REG_L ra, 9*SZREG(sp)
+  REG_L a0, 1*SZREG(sp)
+  REG_L a1, 2*SZREG(sp)
+  REG_L a2, 3*SZREG(sp)
+  REG_L a3, 4*SZREG(sp)
+  REG_L a4, 5*SZREG(sp)
+  REG_L a5, 6*SZREG(sp)
+  REG_L a6, 7*SZREG(sp)
+  REG_L a7, 8*SZREG(sp)
+  addi sp, sp, FRAME_SIZE
+
+  # Invoke the callee.
+  jr t1
+END (_dl_runtime_resolve)
diff --git a/sysdeps/riscv/gccframe.h b/sysdeps/riscv/gccframe.h
new file mode 100644
index 000000000000..28f6908826e2
--- /dev/null
+++ b/sysdeps/riscv/gccframe.h
@@ -0,0 +1,21 @@ 
+/* Definition of object in frame unwind info.  RISC-V version.
+   Copyright (C) 2001-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define FIRST_PSEUDO_REGISTER 66
+
+#include <sysdeps/generic/gccframe.h>
diff --git a/sysdeps/riscv/jmpbuf-unwind.h b/sysdeps/riscv/jmpbuf-unwind.h
new file mode 100644
index 000000000000..8b4ed8196dec
--- /dev/null
+++ b/sysdeps/riscv/jmpbuf-unwind.h
@@ -0,0 +1,46 @@ 
+/* Examine __jmp_buf for unwinding frames.  RISC-V version.
+   Copyright (C) 2003-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <setjmp.h>
+#include <stdint.h>
+#include <unwind.h>
+#include <sysdep.h>
+
+/* Test if longjmp to JMPBUF would unwind the frame
+   containing a local variable at ADDRESS.  */
+#define _JMPBUF_UNWINDS(jmpbuf, address, demangle)		\
+  ((void *) (address) < (void *) demangle ((jmpbuf)[0].__sp))
+
+#define _JMPBUF_CFA_UNWINDS_ADJ(_jmpbuf, _context, _adj) \
+  _JMPBUF_UNWINDS_ADJ (_jmpbuf, (void *) _Unwind_GetCFA (_context), _adj)
+
+static inline uintptr_t __attribute__ ((unused))
+_jmpbuf_sp (__jmp_buf regs)
+{
+  uintptr_t sp = regs[0].__sp;
+#ifdef PTR_DEMANGLE
+  PTR_DEMANGLE (sp);
+#endif
+  return sp;
+}
+
+#define _JMPBUF_UNWINDS_ADJ(_jmpbuf, _address, _adj) \
+  ((uintptr_t) (_address) - (_adj) < _jmpbuf_sp (_jmpbuf) - (_adj))
+
+/* We use the normal longjmp for unwinding.  */
+#define __libc_unwind_longjmp(buf, val) __libc_longjmp (buf, val)
diff --git a/sysdeps/riscv/machine-gmon.h b/sysdeps/riscv/machine-gmon.h
new file mode 100644
index 000000000000..2ec7a34d9bc6
--- /dev/null
+++ b/sysdeps/riscv/machine-gmon.h
@@ -0,0 +1,34 @@ 
+/* RISC-V definitions for profiling support.
+   Copyright (C) 1996-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Accept 'frompc' address as argument from the function that calls
+   _mcount for profiling.  Use  __builtin_return_address (0)
+   for the 'selfpc' address.  */
+
+#include <sysdep.h>
+
+static void mcount_internal (u_long frompc, u_long selfpc);
+
+#define _MCOUNT_DECL(frompc, selfpc) \
+static inline void mcount_internal (u_long frompc, u_long selfpc)
+
+#define MCOUNT								\
+void _mcount (void *frompc)						\
+{									\
+  mcount_internal ((u_long) frompc, (u_long) RETURN_ADDRESS (0));	\
+}
diff --git a/sysdeps/riscv/memusage.h b/sysdeps/riscv/memusage.h
new file mode 100644
index 000000000000..eec156b3ec68
--- /dev/null
+++ b/sysdeps/riscv/memusage.h
@@ -0,0 +1,21 @@ 
+/* Machine-specific definitions for memory usage profiling, RISC-V version.
+   Copyright (C) 2000-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define GETSP() ({ register uintptr_t stack_ptr asm ("sp"); stack_ptr; })
+
+#include <sysdeps/generic/memusage.h>
diff --git a/sysdeps/riscv/setjmp.S b/sysdeps/riscv/setjmp.S
new file mode 100644
index 000000000000..602218dc716b
--- /dev/null
+++ b/sysdeps/riscv/setjmp.S
@@ -0,0 +1,74 @@ 
+/* setjmp for RISC-V.
+   Copyright (C) 1996-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <sys/asm.h>
+
+ENTRY (_setjmp)
+  li	a1, 0
+  j	__sigsetjmp
+END (_setjmp)
+ENTRY (setjmp)
+  li	a1, 1
+  /* Fallthrough */
+END (setjmp)
+ENTRY (__sigsetjmp)
+	REG_S ra,  0*SZREG(a0)
+	REG_S s0,  1*SZREG(a0)
+	REG_S s1,  2*SZREG(a0)
+	REG_S s2,  3*SZREG(a0)
+	REG_S s3,  4*SZREG(a0)
+	REG_S s4,  5*SZREG(a0)
+	REG_S s5,  6*SZREG(a0)
+	REG_S s6,  7*SZREG(a0)
+	REG_S s7,  8*SZREG(a0)
+	REG_S s8,  9*SZREG(a0)
+	REG_S s9, 10*SZREG(a0)
+	REG_S s10,11*SZREG(a0)
+	REG_S s11,12*SZREG(a0)
+	REG_S sp, 13*SZREG(a0)
+
+#ifndef __riscv_float_abi_soft
+	FREG_S fs0, 14*SZREG+ 0*SZFREG(a0)
+	FREG_S fs1, 14*SZREG+ 1*SZFREG(a0)
+	FREG_S fs2, 14*SZREG+ 2*SZFREG(a0)
+	FREG_S fs3, 14*SZREG+ 3*SZFREG(a0)
+	FREG_S fs4, 14*SZREG+ 4*SZFREG(a0)
+	FREG_S fs5, 14*SZREG+ 5*SZFREG(a0)
+	FREG_S fs6, 14*SZREG+ 6*SZFREG(a0)
+	FREG_S fs7, 14*SZREG+ 7*SZFREG(a0)
+	FREG_S fs8, 14*SZREG+ 8*SZFREG(a0)
+	FREG_S fs9, 14*SZREG+ 9*SZFREG(a0)
+	FREG_S fs10,14*SZREG+10*SZFREG(a0)
+	FREG_S fs11,14*SZREG+11*SZFREG(a0)
+#endif
+
+#if !IS_IN (libc) && IS_IN (rtld)
+  /* In ld.so we never save the signal mask.  */
+  li a0, 0
+  ret
+#else
+  /* Make a tail call to __sigjmp_save; it takes the same args.  */
+  j __sigjmp_save
+#endif
+
+
+END (__sigsetjmp)
+
+hidden_def (__sigsetjmp)
+weak_alias (_setjmp, __GI__setjmp)
diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h
new file mode 100644
index 000000000000..8ac9059d8e61
--- /dev/null
+++ b/sysdeps/riscv/sys/asm.h
@@ -0,0 +1,78 @@ 
+/* Miscellaneous macros.
+   Copyright (C) 2000-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_ASM_H
+#define _SYS_ASM_H
+
+/*
+ * Macros to handle different pointer/register sizes for 32/64-bit code
+ */
+#if __riscv_xlen == 64
+# define PTRLOG 3
+# define SZREG	8
+# define REG_S sd
+# define REG_L ld
+#elif __riscv_xlen == 32
+# define PTRLOG 2
+# define SZREG	4
+# define REG_S sw
+# define REG_L lw
+#else
+# error __riscv_xlen must equal 32 or 64
+#endif
+
+#if !defined __riscv_float_abi_soft
+/* For ABI uniformity, reserve 8 bytes for floats, even if double-precision
+   floating-point is not supported in hardware.  */
+# if defined __riscv_float_abi_single
+#  define FREG_L flw
+#  define FREG_S fsw
+#  define SZFREG 4
+# elif defined __riscv_float_abi_double
+#  define FREG_L fld
+#  define FREG_S fsd
+#  define SZFREG 8
+# else
+#  error unsupported FLEN
+# endif
+#endif
+
+/*
+ * LEAF - declare leaf routine
+ */
+#define	LEAF(symbol)				\
+		.globl	symbol;			\
+		.align	2;			\
+		.type	symbol,@function;	\
+symbol:						\
+		cfi_startproc;
+
+/*
+ * END - mark end of function
+ */
+#undef END
+#define END(function)				\
+		cfi_endproc;			\
+		.size	function,.-function
+
+/*
+ * Stack alignment
+ */
+#define ALMASK	~15
+
+#endif /* sys/asm.h */
diff --git a/sysdeps/riscv/tls-macros.h b/sysdeps/riscv/tls-macros.h
new file mode 100644
index 000000000000..7431d9ff25e0
--- /dev/null
+++ b/sysdeps/riscv/tls-macros.h
@@ -0,0 +1,60 @@ 
+/* Macros to support TLS testing in times of missing compiler support.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+
+#include <sys/cdefs.h>
+#include <sys/asm.h>
+#include <sysdep.h>
+#include "dl-tls.h"
+
+#define LOAD_GP						\
+	".option push\n\t"				\
+	".option norelax\n\t"				\
+	"la gp, __global_pointer$\n\t"			\
+	".option pop\n\t"
+
+#define UNLOAD_GP
+
+#define TLS_GD(x)					\
+	({ void *__result;				\
+	asm (LOAD_GP					\
+	     "la.tls.gd %0, " #x "\n\t"			\
+	     UNLOAD_GP					\
+	     : "=r" (__result));			\
+	__tls_get_addr (__result); })
+
+#define TLS_LD(x) TLS_GD(x)
+
+#define TLS_IE(x)					\
+	({ void *__result;				\
+	asm (LOAD_GP					\
+	     "la.tls.ie %0, " #x "\n\t"			\
+	     UNLOAD_GP					\
+	     : "=r" (__result));			\
+	__tls_get_addr (__result); })
+
+#define TLS_LE(x)					\
+	({ void *__result;				\
+	asm (LOAD_GP					\
+	     "lui %0, %%tprel_hi(" #x ")\n\t"		\
+	     "add %0, %0, tp, %%tprel_add(" #x ")\n\t"	\
+	     "lw %0, %%tprel_lo(" #x ")(%0)\n\t"	\
+	     UNLOAD_GP					\
+	     : "=r" (__result));			\
+	__tls_get_addr (__result); })