From patchwork Thu Oct 5 10:43:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajalakshmi S X-Patchwork-Id: 23338 X-Patchwork-Delegate: azanella@linux.vnet.ibm.com Received: (qmail 18726 invoked by alias); 5 Oct 2017 10:43:40 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 18712 invoked by uid 89); 5 Oct 2017 10:43:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=unwanted X-HELO: mx0a-001b2d01.pphosted.com From: Rajalakshmi Srinivasaraghavan To: libc-alpha@sourceware.org Cc: Rajalakshmi Srinivasaraghavan Subject: [PATCH] powerpc: Fix IFUNC for memrchr Date: Thu, 5 Oct 2017 16:13:24 +0530 X-TM-AS-MML: disable x-cbid: 17100510-0040-0000-0000-000003597627 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17100510-0041-0000-0000-00000CDA9D77 Message-Id: <1507200204-23449-1-git-send-email-raji@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-05_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1710050152 Recent commit 59ba2d2b5421 missed to add __memrchr_power8 in ifunc list. Also handled discarding unwanted bytes for unaligned inputs in power8 optimization. 2017-10-05 Rajalakshmi Srinivasaraghavan * sysdeps/powerpc/powerpc64/multiarch/memrchr-ppc64.c: Revert back to powerpc32 file. * sysdeps/powerpc/powerpc64/multiarch/memrchr.c (memrchr): Add __memrchr_power8 to ifunc list. * sysdeps/powerpc/powerpc64/power8/memrchr.S: Mask extra bytes for unaligned inputs. --- .../powerpc/powerpc64/multiarch/memrchr-ppc64.c | 15 +------------- sysdeps/powerpc/powerpc64/multiarch/memrchr.c | 3 +++ sysdeps/powerpc/powerpc64/power8/memrchr.S | 24 ++++++++++++++++++++++ 3 files changed, 28 insertions(+), 14 deletions(-) diff --git a/sysdeps/powerpc/powerpc64/multiarch/memrchr-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/memrchr-ppc64.c index be24689336..e2d53ac0f4 100644 --- a/sysdeps/powerpc/powerpc64/multiarch/memrchr-ppc64.c +++ b/sysdeps/powerpc/powerpc64/multiarch/memrchr-ppc64.c @@ -15,17 +15,4 @@ You should have received a copy of the GNU Lesser General Public License along with the GNU C Library; if not, see . */ - -#include - -#define MEMRCHR __memrchr_ppc - -#undef weak_alias -#define weak_alias(a, b) - -#undef libc_hidden_builtin_def -#define libc_hidden_builtin_def(name) - -extern __typeof (memrchr) __memrchr_ppc attribute_hidden; - -#include +#include diff --git a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c index fb09fdf89c..441598ace5 100644 --- a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c +++ b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c @@ -23,10 +23,13 @@ extern __typeof (__memrchr) __memrchr_ppc attribute_hidden; extern __typeof (__memrchr) __memrchr_power7 attribute_hidden; +extern __typeof (__memrchr) __memrchr_power8 attribute_hidden; /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle ifunc symbol properly. */ libc_ifunc (__memrchr, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __memrchr_power8 : (hwcap & PPC_FEATURE_HAS_VSX) ? __memrchr_power7 : __memrchr_ppc); diff --git a/sysdeps/powerpc/powerpc64/power8/memrchr.S b/sysdeps/powerpc/powerpc64/power8/memrchr.S index 521b3c84a2..22b01ec69c 100644 --- a/sysdeps/powerpc/powerpc64/power8/memrchr.S +++ b/sysdeps/powerpc/powerpc64/power8/memrchr.S @@ -233,11 +233,35 @@ L(found): #endif addi r8, r8, 63 sub r3, r8, r6 /* Compute final address. */ + cmpld cr7, r3, r10 + bgelr cr7 + li r3, 0 blr /* Found a match in last 16 bytes. */ .align 4 L(found_16B): + cmpld r8, r10 /* Are we on the last QW? */ + bge L(last) + /* Now discard bytes before starting address. */ + sub r9, r10, r8 + MTVRD(v9, r9) + vspltisb v8, 3 + /* Mask unwanted bytes. */ +#ifdef __LITTLE_ENDIAN__ + lvsr v7, 0, r10 + vperm v6, v0, v6, v7 + vsldoi v9, v0, v9, 8 + vsl v9, v9, v8 + vslo v6, v6, v9 +#else + lvsl v7, 0, r10 + vperm v6, v6, v0, v7 + vsldoi v9, v0, v9, 8 + vsl v9, v9, v8 + vsro v6, v6, v9 +#endif +L(last): /* Permute the first bit of each byte into bits 48-63. */ VBPERMQ(v6, v6, v10) /* Shift each component into its correct position for merging. */