From patchwork Thu Jun 15 20:45:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 21039 Received: (qmail 62169 invoked by alias); 15 Jun 2017 20:45:48 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 62153 invoked by uid 89); 15 Jun 2017 20:45:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-27.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KHOP_DYNAMIC, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Reply-To: pc@us.ibm.com To: "libc-alpha@sourceware.org" , Richard Henderson , Tulio Magno Quites Machado Filho From: Paul Clarke Subject: [PATCH] powerpc: fix sysconf support for cache geometries Date: Thu, 15 Jun 2017 15:45:44 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17061520-0028-0000-0000-000007D1CA85 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007239; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000212; SDB=6.00875287; UDB=6.00435781; IPR=6.00655376; BA=6.00005423; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00015840; XFM=3.00000015; UTC=2017-06-15 20:45:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17061520-0029-0000-0000-0000363CB617 Message-Id: <3a5ed534-95d2-4d66-533e-aaed56134344@us.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-15_10:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1706150359 Commit cdfbe5037f2f67bf5f560b73732b69d0fabe2314 added sysconf support for cache geometries on powerpc, but mishandled errno. For valid input parameters, sysconf() should not set errno. 2017-06-15 Paul A. Clarke * sysdeps/unix/sysv/linux/powerpc/sysconf.c: Remove references to errno, and simplify remaining related code. --- sysdeps/unix/sysv/linux/powerpc/sysconf.c | 37 +++++++------------------------ 1 file changed, 8 insertions(+), 29 deletions(-) diff --git a/sysdeps/unix/sysv/linux/powerpc/sysconf.c b/sysdeps/unix/sysv/linux/powerpc/sysconf.c index 10c4aa0..7bed701 100644 --- a/sysdeps/unix/sysv/linux/powerpc/sysconf.c +++ b/sysdeps/unix/sysv/linux/powerpc/sysconf.c @@ -22,37 +22,16 @@ static long linux_sysconf (int name); -static long -auxv2sysconf (unsigned long type) -{ - long rc; - rc = __getauxval (type); - if (rc == 0) - { - __set_errno (EINVAL); - rc = -1; - } - return rc; -} - -static long +static inline long auxv2sysconf_cache_associativity (unsigned long type) { - long rc; - rc = auxv2sysconf (type); - if (rc != -1) - rc = (rc & 0xffff0000) >> 16; - return rc; + return (__getauxval (type) & 0xffff0000) >> 16; } -static long +static inline long auxv2sysconf_cache_linesize (unsigned long type) { - long rc; - rc = auxv2sysconf (type); - if (rc != -1) - rc = rc & 0xffff; - return rc; + return __getauxval (type) & 0xffff; } /* Get the value of the system variable NAME. */ @@ -62,25 +41,25 @@ __sysconf (int name) switch (name) { case _SC_LEVEL1_ICACHE_SIZE: - return auxv2sysconf (AT_L1I_CACHESIZE); + return __getauxval (AT_L1I_CACHESIZE); case _SC_LEVEL1_ICACHE_ASSOC: return auxv2sysconf_cache_associativity (AT_L1I_CACHEGEOMETRY); case _SC_LEVEL1_ICACHE_LINESIZE: return auxv2sysconf_cache_linesize (AT_L1I_CACHEGEOMETRY); case _SC_LEVEL1_DCACHE_SIZE: - return auxv2sysconf (AT_L1D_CACHESIZE); + return __getauxval (AT_L1D_CACHESIZE); case _SC_LEVEL1_DCACHE_ASSOC: return auxv2sysconf_cache_associativity (AT_L1D_CACHEGEOMETRY); case _SC_LEVEL1_DCACHE_LINESIZE: return auxv2sysconf_cache_linesize (AT_L1D_CACHEGEOMETRY); case _SC_LEVEL2_CACHE_SIZE: - return auxv2sysconf (AT_L2_CACHESIZE); + return __getauxval (AT_L2_CACHESIZE); case _SC_LEVEL2_CACHE_ASSOC: return auxv2sysconf_cache_associativity (AT_L2_CACHEGEOMETRY); case _SC_LEVEL2_CACHE_LINESIZE: return auxv2sysconf_cache_linesize (AT_L2_CACHEGEOMETRY); case _SC_LEVEL3_CACHE_SIZE: - return auxv2sysconf (AT_L3_CACHESIZE); + return __getauxval (AT_L3_CACHESIZE); case _SC_LEVEL3_CACHE_ASSOC: return auxv2sysconf_cache_associativity (AT_L3_CACHEGEOMETRY); case _SC_LEVEL3_CACHE_LINESIZE: