diff mbox

[v2,4/5] gdbserver: xtensa: add call0 support

Message ID 1487729356-10432-5-git-send-email-jcmvbkbc@gmail.com
State New, archived
Headers

Commit Message

Max Filippov Feb. 22, 2017, 2:09 a.m. UTC 
  Correctly handle a0- registers on requests from remote gdb. This fixes

  'Register 1 is not available'

and subsequent assertion in the remote gdb connecting to the gdbserver:

  'findvar.c:291: internal-error: value_of_register_lazy:
    Assertion `frame_id_p(get_frame_id (frame))' failed.'

The register structure is the same for windowed and call0 ABIs because
currently linux kernel internally requires windowed registers, so they
are always present.

gdb/gdbserver/
2017-01-18  Max Filippov  <jcmvbkbc@gmail.com>

	* linux-xtensa-low.c (C0_NREGS): New definition.
	(xtensa_fill_gregset): Call collect_register for all registers in
	a0_regnum..a0_regnum + C0_NREGS range.
	(xtensa_store_gregset): Call supply_register for all registers in
	a0_regnum..a0_regnum + C0_NREGS range.
---
Changes v1->v2:
- add missing spaces to type casts;
- add parentheses to new conditions;
- move directory name up in the commit message.

 gdb/gdbserver/linux-xtensa-low.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
diff mbox

Patch

diff --git a/gdb/gdbserver/linux-xtensa-low.c b/gdb/gdbserver/linux-xtensa-low.c
index 98c0bf2..89efa05 100644
--- a/gdb/gdbserver/linux-xtensa-low.c
+++ b/gdb/gdbserver/linux-xtensa-low.c
@@ -45,6 +45,7 @@  xtensa_fill_gregset (struct regcache *regcache, void *buf)
   elf_greg_t* rset = (elf_greg_t*)buf;
   const struct target_desc *tdesc = regcache->tdesc;
   int ar0_regnum;
+  int a0_regnum;
   char *ptr;
   int i;
 
@@ -72,6 +73,17 @@  xtensa_fill_gregset (struct regcache *regcache, void *buf)
   collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
   collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
   collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
+
+  a0_regnum = find_regno (tdesc, "a0");
+  ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
+
+  for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
+    {
+      if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
+	ptr = (char *) &rset[R_A0];
+      collect_register (regcache, i, ptr);
+      ptr += register_size (tdesc, i);
+    }
 }
 
 static void
@@ -80,6 +92,7 @@  xtensa_store_gregset (struct regcache *regcache, const void *buf)
   const elf_greg_t* rset = (const elf_greg_t*)buf;
   const struct target_desc *tdesc = regcache->tdesc;
   int ar0_regnum;
+  int a0_regnum;
   char *ptr;
   int i;
 
@@ -94,6 +107,17 @@  xtensa_store_gregset (struct regcache *regcache, const void *buf)
       ptr += register_size (tdesc, i);
     }
 
+  a0_regnum = find_regno (tdesc, "a0");
+  ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
+
+  for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
+    {
+      if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
+	ptr = (char *) &rset[R_A0];
+      supply_register (regcache, i, ptr);
+      ptr += register_size (tdesc, i);
+    }
+
   /* Loop registers, if hardware has it.  */
 
 #if XCHAL_HAVE_LOOPS