diff mbox

[1/4] Restrict matching add/sub sp, #imm

Message ID 53B9F9C2.70601@codesourcery.com
State New, archived
Headers

Commit Message

Yao Qi July 7, 2014, 1:37 a.m. UTC 
  On 07/03/2014 04:31 PM, Will Newton wrote:
> One too many ms?
> 

Oh, sorry.

>> >         (thumb_in_function_epilogue_p): Don't match 'sub sp, #imm'.
>> > ---
>> >  gdb/arm-tdep.c | 15 +++++----------
>> >  1 file changed, 5 insertions(+), 10 deletions(-)
>> >
>> > diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
>> > index 8cc60a4..0fc7fc1 100644
>> > --- a/gdb/arm-tdep.c
>> > +++ b/gdb/arm-tdep.c
>> > @@ -737,16 +737,11 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
>> >                 pv_area_store (stack, regs[ARM_SP_REGNUM], 4, regs[regno]);
>> >               }
>> >         }
>> > -      else if ((insn & 0xff00) == 0xb000)      /* add sp, #simm  OR
>> > -                                                  sub sp, #simm */
>> > +      else if ((insn & 0xff80) == 0xb080)      /* sub sp, #simm */
> I wonder if we should adjust the comment to just #imm, as #simm
> implies it is a signed quantity.
> 

Fixed.

Comments

Joel Brobecker July 11, 2014, 1:25 p.m. UTC | #1 
> 2014-07-07  Yao Qi  <yao@codesourcery.com>
> 
> 	* arm-tdep.c (thumb_analyze_prologue): Don't match instruction
> 	'add sp, #imm'.
> 	(thumb_in_function_epilogue_p): Don't match 'sub sp, #imm'.

Sorry for the delay, Yao. The updated version is OK to push.
Yao Qi July 11, 2014, 1:35 p.m. UTC | #2 
On 07/11/2014 09:25 PM, Joel Brobecker wrote:
> Sorry for the delay, Yao. The updated version is OK to push.

Thanks for the review, Joel.  All of them are pushed in.
diff mbox

Patch

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 8cc60a4..6b1cf3c 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -737,16 +737,11 @@  thumb_analyze_prologue (struct gdbarch *gdbarch,
 		pv_area_store (stack, regs[ARM_SP_REGNUM], 4, regs[regno]);
 	      }
 	}
-      else if ((insn & 0xff00) == 0xb000)	/* add sp, #simm  OR  
-						   sub sp, #simm */
+      else if ((insn & 0xff80) == 0xb080)	/* sub sp, #imm */
 	{
 	  offset = (insn & 0x7f) << 2;		/* get scaled offset */
-	  if (insn & 0x80)			/* Check for SUB.  */
-	    regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
-						   -offset);
-	  else
-	    regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
-						   offset);
+	  regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
+						 -offset);
 	}
       else if ((insn & 0xf800) == 0xa800)	/* add Rd, sp, #imm */
 	regs[bits (insn, 8, 10)] = pv_add_constant (regs[ARM_SP_REGNUM],
@@ -3264,7 +3259,7 @@  thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
 	found_return = 1;
       else if (insn == 0x46bd)  /* mov sp, r7 */
 	found_stack_adjust = 1;
-      else if ((insn & 0xff00) == 0xb000)  /* add sp, imm or sub sp, imm  */
+      else if ((insn & 0xff80) == 0xb000)  /* add sp, imm */
 	found_stack_adjust = 1;
       else if ((insn & 0xfe00) == 0xbc00)  /* pop <registers> */
 	{
@@ -3324,7 +3319,7 @@  thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
 
       if (insn2 == 0x46bd)  /* mov sp, r7 */
 	found_stack_adjust = 1;
-      else if ((insn2 & 0xff00) == 0xb000)  /* add sp, imm or sub sp, imm  */
+      else if ((insn2 & 0xff80) == 0xb000)  /* add sp, imm */
 	found_stack_adjust = 1;
       else if ((insn2 & 0xff00) == 0xbc00)  /* pop <registers> without PC */
 	found_stack_adjust = 1;