From patchwork Sat Aug 13 19:48:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 14548 Received: (qmail 129233 invoked by alias); 13 Aug 2016 19:48:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 129216 invoked by uid 89); 13 Aug 2016 19:48:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=troubles, 2317, xxx X-HELO: smtp.gentoo.org Received: from smtp.gentoo.org (HELO smtp.gentoo.org) (140.211.166.183) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 13 Aug 2016 19:48:18 +0000 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id 1671C340CD9 for ; Sat, 13 Aug 2016 19:48:17 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH/committed] sim: bfin: split out common mach/model defines into arch.h [PR sim/20438] Date: Sat, 13 Aug 2016 12:48:13 -0700 Message-Id: <20160813194813.25139-1-vapier@gentoo.org> X-IsSubscribed: yes The current machs.h mixes common enums with Blackfin-specific defines. This causes us troubles with header inclusion order such that we can't drop the old SIM_CPU typedef (which is duplicated in common code). By splitting the two up, we can unwind this dependency chain, and drop the old typedef. It also fixes building with older gcc versions. --- sim/bfin/ChangeLog | 9 +++++++++ sim/bfin/arch.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ sim/bfin/machs.h | 20 -------------------- sim/bfin/sim-main.h | 8 ++------ 4 files changed, 55 insertions(+), 26 deletions(-) create mode 100644 sim/bfin/arch.h diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index 3dea7c9132fc..a995436d8703 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,3 +1,12 @@ +2016-08-13 Mike Frysinger + + PR sim/20438 + * machs.h (MODEL_TYPE, MACH_ATTR, BFIN_INSN_*): Move ... + * arch.h: ... to this new header file. + * sim-main.h (SIM_CPU): Delete. + Include arch.h before sim-base.h, and move sim-base.h before + bfin-sim.h. + 2016-01-10 Mike Frysinger * config.in, configure: Regenerate. diff --git a/sim/bfin/arch.h b/sim/bfin/arch.h new file mode 100644 index 000000000000..b86d3e9acdda --- /dev/null +++ b/sim/bfin/arch.h @@ -0,0 +1,44 @@ +/* Simulator for Analog Devices Blackfin processors. + + Copyright (C) 2005-2016 Free Software Foundation, Inc. + Contributed by Analog Devices, Inc. + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef BFIN_ARCH_H +#define BFIN_ARCH_H + +typedef enum model_type { +#define P(n) MODEL_BF##n, +#include "proc_list.def" +#undef P + MODEL_MAX +} MODEL_TYPE; + +typedef enum mach_attr { + MACH_BASE, + MACH_BFIN, + MACH_MAX +} MACH_ATTR; + +enum { +#define I(insn) BFIN_INSN_##insn, +#include "insn_list.def" +#undef I + BFIN_INSN_MAX +}; + +#endif diff --git a/sim/bfin/machs.h b/sim/bfin/machs.h index 03729829926a..36819ae6428a 100644 --- a/sim/bfin/machs.h +++ b/sim/bfin/machs.h @@ -21,19 +21,6 @@ #ifndef _BFIN_MACHS_H_ #define _BFIN_MACHS_H_ -typedef enum model_type { -#define P(n) MODEL_BF##n, -#include "proc_list.def" -#undef P - MODEL_MAX -} MODEL_TYPE; - -typedef enum mach_attr { - MACH_BASE, - MACH_BFIN, - MACH_MAX -} MACH_ATTR; - #define CPU_MODEL_NUM(cpu) MODEL_NUM (CPU_MODEL (cpu)) /* XXX: Some of this probably belongs in CPU_MODEL. */ @@ -46,13 +33,6 @@ void bfin_model_cpu_init (SIM_DESC, SIM_CPU *); bu32 bfin_model_get_chipid (SIM_DESC); bu32 bfin_model_get_dspid (SIM_DESC); -enum { -#define I(insn) BFIN_INSN_##insn, -#include "insn_list.def" -#undef I - BFIN_INSN_MAX -}; - #define BFIN_COREMMR_CEC_BASE 0xFFE02100 #define BFIN_COREMMR_CEC_SIZE (4 * 5) #define BFIN_COREMMR_CTIMER_BASE 0xFFE03000 diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h index 51fb87e4fafd..34fd15383560 100644 --- a/sim/bfin/sim-main.h +++ b/sim/bfin/sim-main.h @@ -23,17 +23,13 @@ #include "sim-basics.h" #include "sim-signal.h" - -/* TODO: Delete this. Need to convert bu32/etc... to common sim types - and unwind the bfin-sim.h/machs.h include below first though. */ -typedef struct _sim_cpu SIM_CPU; +#include "arch.h" +#include "sim-base.h" #include "bfin-sim.h" #include "machs.h" -#include "sim-base.h" - struct _sim_cpu { /* ... simulator specific members ... */ struct bfin_cpu_state state;