Commit: Export AArch64 sum's single step function
Commit Message
Hi Guys,
I am checking in the patch below to export the AArch64 sim's single
step function, so that it can be used when a tool needs to just
execute one instruction at a time. The patch also fixes a minor bug
in sim_create_inferior which would seg-fault if called without an
initialised bfd object.
Cheers
Nick
sim/ChangeLog
2016-08-11 Nick Clifton <nickc@redhat.com>
* interp.c (sim_create_inferior): Allow for being called with a
NULL abfd parameter. If a bfd is provided, initialise the sim
with that start address.
* simulator.c (HALT_NYI): Just print out the numeric value of the
instruction when not tracing.
(aarch64_step): Change from static to global.
* simulator.h: Add a prototype for aarch64_step().
Comments
On 11 Aug 2016 15:04, Nick Clifton wrote:
> I am checking in the patch below to export the AArch64 sim's single
> step function, so that it can be used when a tool needs to just
> execute one instruction at a time.
this is already possible with the common sim API -- sim_resume() has a
"step" argument specifically to do single stepping. no sim should be
exporting *any* symbol other than the handful of sim_xxx that the common
API currently requires. once i can finish inverting all the state so
we have callbacks (akin to gdb's architecture), then arch sims will not
be allowed to export any symbols at all, and it'll be enforced in the
common code with symbol visibility.
am i misunderstanding what you're doing ?
-mike
Hi Mike,
> this is already possible with the common sim API -- sim_resume() has a
> "step" argument specifically to do single stepping.
Hmm, OK, but how is this single stepping communicated to the target simulator ?
As far as I can see the AArch64 simulator does not support single stepping
(unless the host has inserted breakpoint instructions into the simulated instruction
space). I assume that this is a bug in the aarch64 simulator code, but what exactly
is wrong ?
Hmm, I see that some other target simulators implement a sim_resume() function of
their own. Perhaps this is the problem - the aarch64 sim should do the same ?
Cheers
Nick
On 11 Aug 2016 16:32, Nick Clifton wrote:
> Hi Mike,
> > this is already possible with the common sim API -- sim_resume() has a
> > "step" argument specifically to do single stepping.
>
> Hmm, OK, but how is this single stepping communicated to the target simulator ?
>
> As far as I can see the AArch64 simulator does not support single stepping
> (unless the host has inserted breakpoint instructions into the simulated instruction
> space). I assume that this is a bug in the aarch64 simulator code, but what exactly
> is wrong ?
>
> Hmm, I see that some other target simulators implement a sim_resume() function of
> their own. Perhaps this is the problem - the aarch64 sim should do the same ?
no, you don't want to implement sim_resume. any sim that does you should
ignore. i think the prob is that the aarch64 sim_engine_run is missing a
call to sim_events_process. look at ft32/interp.c for a bare bones example.
once you do that, you'll see the common sim_resume schedules an event after
one tick when step==true.
honestly, i'm a little surprised things are working w/out this event process
callback ...
-mike
Hi Mike,
> no, you don't want to implement sim_resume. any sim that does you should
> ignore. i think the prob is that the aarch64 sim_engine_run is missing a
> call to sim_events_process. look at ft32/interp.c for a bare bones example.
Ah - thanks - that was the pointer I needed. (I kept on looking at the wrong
targets for examples of what to do).
I have now checked in a patch to revert my previous delta - no more exporting
aarch64_step() - and to make aarch64_run process events correctly.
> honestly, i'm a little surprised things are working w/out this event process
> callback ...
It probably wasn't in GDB. I do not use GDB with AArch64 at the moment, so I
had never come across the deficiency. With this patch in it might even work now...
Cheers
Nick
@@ -135,7 +135,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
char * const *argv, char * const *env)
{
sim_cpu *cpu = STATE_CPU (sd, 0);
- long storage;
+ long storage = 0;
bfd_vma addr = 0;
if (abfd != NULL)
@@ -154,7 +154,8 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
STATE_PROG_ARGV (sd) = dupargv (argv);
}
- storage = bfd_get_symtab_upper_bound (abfd);
+ if (abfd != NULL)
+ storage = bfd_get_symtab_upper_bound (abfd);
if (storage > 0)
{
symtab = (asymbol **) xmalloc (storage);
@@ -163,7 +164,7 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
qsort (symtab, symcount, sizeof (asymbol *), compare_symbols);
}
- aarch64_init (cpu, bfd_get_start_address (abfd));
+ aarch64_init (cpu, addr);
return SIM_RC_OK;
}
@@ -332,7 +333,6 @@ sim_open (SIM_OPEN_KIND kind,
struct bfd * abfd,
char * const * argv)
{
- int i;
sim_cpu *cpu;
SIM_DESC sd = sim_state_alloc (kind, callback);
@@ -64,10 +64,8 @@
" exe addr %" PRIx64, \
__LINE__, aarch64_get_PC (cpu)); \
if (! TRACE_ANY_P (cpu)) \
- { \
- sim_io_eprintf (CPU_STATE (cpu), "SIM Error: Unimplemented instruction: "); \
- trace_disasm (CPU_STATE (cpu), cpu, aarch64_get_PC (cpu)); \
- } \
+ sim_io_eprintf (CPU_STATE (cpu), "SIM Error: Unimplemented instruction: %#08x\n", \
+ aarch64_get_instr (cpu)); \
sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),\
sim_stopped, SIM_SIGABRT); \
} \
@@ -14074,7 +14072,7 @@ aarch64_decode_and_execute (sim_cpu *cpu, uint64_t pc)
}
}
-static bfd_boolean
+bfd_boolean
aarch64_step (sim_cpu *cpu)
{
uint64_t pc = aarch64_get_PC (cpu);
@@ -47,6 +47,10 @@ extern void aarch64_init (sim_cpu *, uint64_t);
extern void aarch64_run (SIM_DESC);
+/* Call this to execute one instruction at the current PC. */
+
+extern bfd_boolean aarch64_step (sim_cpu *);
+
extern const char * aarch64_get_func (uint64_t);
extern uint64_t aarch64_get_sym_value (const char *);
extern void aarch64_init_LIT_table (void);