stdlib/longlong.h: Remove lvalue to rvalue conversion
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| dj/TryBot-apply_patch |
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Patch applied to master at the time it was sent
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| dj/TryBot-32bit |
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Build for i686
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Commit Message
An output constraint takes a lvalue. While GCC happily strips the
incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
default:
error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
---
stdlib/longlong.h | 126 +++++++++++++++++++++++-----------------------
1 file changed, 63 insertions(+), 63 deletions(-)
Comments
On Sun, Oct 10, 2021 at 3:15 PM Fangrui Song via Libc-alpha
<libc-alpha@sourceware.org> wrote:
>
> An output constraint takes a lvalue. While GCC happily strips the
> incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
> default:
This file originally comes from GMP (gmp-6.1.0/longlong.h), does it
make sense to make sure it has been updated there?
It is also in GCC too (gcc/include/longlong.h).
Maybe it is time to resync all three copies, I noticed they are all
different :).
Thanks,
Andrew Pinski
>
> error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
> ---
> stdlib/longlong.h | 126 +++++++++++++++++++++++-----------------------
> 1 file changed, 63 insertions(+), 63 deletions(-)
>
> diff --git a/stdlib/longlong.h b/stdlib/longlong.h
> index ed22486d8a..2f1c701044 100644
> --- a/stdlib/longlong.h
> +++ b/stdlib/longlong.h
> @@ -194,8 +194,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
> #if defined (__arc__) && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \
> - : "=r" ((USItype) (sh)), \
> - "=&r" ((USItype) (sl)) \
> + : "=r" (sh), \
> + "=&r" (sl) \
> : "%r" ((USItype) (ah)), \
> "rICal" ((USItype) (bh)), \
> "%r" ((USItype) (al)), \
> @@ -203,8 +203,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
> : "cc")
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \
> - : "=r" ((USItype) (sh)), \
> - "=&r" ((USItype) (sl)) \
> + : "=r" (sh), \
> + "=&r" (sl) \
> : "r" ((USItype) (ah)), \
> "rICal" ((USItype) (bh)), \
> "r" ((USItype) (al)), \
> @@ -230,7 +230,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
> && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%r" ((USItype) (ah)), \
> "rI" ((USItype) (bh)), \
> @@ -238,7 +238,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
> "rI" ((USItype) (bl)) __CLOBBER_CC)
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "r" ((USItype) (ah)), \
> "rI" ((USItype) (bh)), \
> @@ -262,8 +262,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
> " addcs %0, %0, #65536\n" \
> " adds %1, %1, %3, lsl #16\n" \
> " adc %0, %0, %3, lsr #16" \
> - : "=&r" ((USItype) (xh)), \
> - "=r" ((USItype) (xl)), \
> + : "=&r" (xh), \
> + "=r" (xl), \
> "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
> : "r" ((USItype) (a)), \
> "r" ((USItype) (b)) __CLOBBER_CC ); \
> @@ -348,7 +348,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__hppa) && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%rM" ((USItype) (ah)), \
> "rM" ((USItype) (bh)), \
> @@ -356,7 +356,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "rM" ((USItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "rM" ((USItype) (ah)), \
> "rM" ((USItype) (bh)), \
> @@ -456,7 +456,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%0" ((USItype) (ah)), \
> "g" ((USItype) (bh)), \
> @@ -464,22 +464,22 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "g" ((USItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
> - : "=r" ((USItype) (sh)), \
> - "=&r" ((USItype) (sl)) \
> + : "=r" (sh), \
> + "=&r" (sl) \
> : "0" ((USItype) (ah)), \
> "g" ((USItype) (bh)), \
> "1" ((USItype) (al)), \
> "g" ((USItype) (bl)))
> #define umul_ppmm(w1, w0, u, v) \
> __asm__ ("mul{l} %3" \
> - : "=a" ((USItype) (w0)), \
> - "=d" ((USItype) (w1)) \
> + : "=a" (w0), \
> + "=d" (w1) \
> : "%0" ((USItype) (u)), \
> "rm" ((USItype) (v)))
> #define udiv_qrnnd(q, r, n1, n0, dv) \
> __asm__ ("div{l} %4" \
> - : "=a" ((USItype) (q)), \
> - "=d" ((USItype) (r)) \
> + : "=a" (q), \
> + "=d" (r) \
> : "0" ((USItype) (n0)), \
> "1" ((USItype) (n1)), \
> "rm" ((USItype) (dv)))
> @@ -492,30 +492,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__x86_64__) && W_TYPE_SIZE == 64
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
> - : "=r" ((UDItype) (sh)), \
> - "=&r" ((UDItype) (sl)) \
> + : "=r" (sh), \
> + "=&r" (sl) \
> : "%0" ((UDItype) (ah)), \
> "rme" ((UDItype) (bh)), \
> "%1" ((UDItype) (al)), \
> "rme" ((UDItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
> - : "=r" ((UDItype) (sh)), \
> - "=&r" ((UDItype) (sl)) \
> + : "=r" (sh), \
> + "=&r" (sl) \
> : "0" ((UDItype) (ah)), \
> "rme" ((UDItype) (bh)), \
> "1" ((UDItype) (al)), \
> "rme" ((UDItype) (bl)))
> #define umul_ppmm(w1, w0, u, v) \
> __asm__ ("mul{q} %3" \
> - : "=a" ((UDItype) (w0)), \
> - "=d" ((UDItype) (w1)) \
> + : "=a" (w0), \
> + "=d" (w1) \
> : "%0" ((UDItype) (u)), \
> "rm" ((UDItype) (v)))
> #define udiv_qrnnd(q, r, n1, n0, dv) \
> __asm__ ("div{q} %4" \
> - : "=a" ((UDItype) (q)), \
> - "=d" ((UDItype) (r)) \
> + : "=a" (q), \
> + "=d" (r) \
> : "0" ((UDItype) (n0)), \
> "1" ((UDItype) (n1)), \
> "rm" ((UDItype) (dv)))
> @@ -597,7 +597,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> /* The cmp clears the condition bit. */ \
> __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "0" ((USItype) (ah)), \
> "r" ((USItype) (bh)), \
> @@ -607,7 +607,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> /* The cmp clears the condition bit. */ \
> __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "0" ((USItype) (ah)), \
> "r" ((USItype) (bh)), \
> @@ -688,7 +688,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> " move%.l %/d2,%1\n" \
> " add%.l %/d1,%/d0\n" \
> " move%.l %/d0,%0" \
> - : "=g" ((USItype) (xh)), \
> + : "=g" (xh)), \
> "=g" ((USItype) (xl)) \
> : "g" ((USItype) (a)), \
> "g" ((USItype) (b)) \
> @@ -724,7 +724,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> " move%.l %/d2,%1\n" \
> " add%.l %/d1,%/d0\n" \
> " move%.l %/d0,%0" \
> - : "=g" ((USItype) (xh)), \
> + : "=g" (xh)), \
> "=g" ((USItype) (xl)) \
> : "g" ((USItype) (a)), \
> "g" ((USItype) (b)) \
> @@ -752,7 +752,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__m88000__) && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%rJ" ((USItype) (ah)), \
> "rJ" ((USItype) (bh)), \
> @@ -760,7 +760,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "rJ" ((USItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "rJ" ((USItype) (ah)), \
> "rJ" ((USItype) (bh)), \
> @@ -988,7 +988,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("a %1,%5\n\tae %0,%3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%0" ((USItype) (ah)), \
> "r" ((USItype) (bh)), \
> @@ -996,7 +996,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "r" ((USItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("s %1,%5\n\tse %0,%3" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "0" ((USItype) (ah)), \
> "r" ((USItype) (bh)), \
> @@ -1026,8 +1026,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> " m r2,%3\n" \
> " cas %0,r2,r0\n" \
> " mfs r10,%1" \
> - : "=r" ((USItype) (ph)), \
> - "=r" ((USItype) (pl)) \
> + : "=r" (ph), \
> + "=r" (pl) \
> : "%r" (__m0), \
> "r" (__m1) \
> : "r2"); \
> @@ -1040,12 +1040,12 @@ extern UDItype __umulsidi3 (USItype, USItype);
> do { \
> if ((x) >= 0x10000) \
> __asm__ ("clz %0,%1" \
> - : "=r" ((USItype) (count)) \
> + : "=r" (count) \
> : "r" ((USItype) (x) >> 16)); \
> else \
> { \
> __asm__ ("clz %0,%1" \
> - : "=r" ((USItype) (count)) \
> + : "=r" (count) \
> : "r" ((USItype) (x))); \
> (count) += 16; \
> } \
> @@ -1107,8 +1107,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #define umul_ppmm(w1, w0, u, v) \
> __asm__ ( \
> "dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0" \
> - : "=r<" ((USItype)(w1)), \
> - "=r<" ((USItype)(w0)) \
> + : "=r<" (w1), \
> + "=r<" (w0) \
> : "r" ((USItype)(u)), \
> "r" ((USItype)(v)) \
> : "macl", "mach")
> @@ -1179,7 +1179,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "%rJ" ((USItype) (ah)), \
> "rI" ((USItype) (bh)), \
> @@ -1188,7 +1188,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> __CLOBBER_CC)
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \
> - : "=r" ((USItype) (sh)), \
> + : "=r" (sh), \
> "=&r" ((USItype) (sl)) \
> : "rJ" ((USItype) (ah)), \
> "rI" ((USItype) (bh)), \
> @@ -1201,7 +1201,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> register USItype __g1 asm ("g1"); \
> __asm__ ("umul\t%2,%3,%1\n\t" \
> "srlx\t%1, 32, %0" \
> - : "=r" ((USItype) (w1)), \
> + : "=r" (w1), \
> "=r" (__g1) \
> : "r" ((USItype) (u)), \
> "r" ((USItype) (v))); \
> @@ -1212,8 +1212,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "udiv\t%3,%4,%0\n\t" \
> "umul\t%0,%4,%1\n\t" \
> "sub\t%3,%1,%1" \
> - : "=&r" ((USItype) (__q)), \
> - "=&r" ((USItype) (__r)) \
> + : "=&r" (__q), \
> + "=&r" (__r) \
> : "r" ((USItype) (__n1)), \
> "r" ((USItype) (__n0)), \
> "r" ((USItype) (__d)))
> @@ -1221,14 +1221,14 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__sparc_v8__)
> #define umul_ppmm(w1, w0, u, v) \
> __asm__ ("umul %2,%3,%1;rd %%y,%0" \
> - : "=r" ((USItype) (w1)), \
> - "=r" ((USItype) (w0)) \
> + : "=r" (w1), \
> + "=r" (w0) \
> : "r" ((USItype) (u)), \
> "r" ((USItype) (v)))
> #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
> __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
> - : "=&r" ((USItype) (__q)), \
> - "=&r" ((USItype) (__r)) \
> + : "=&r" (__q), \
> + "=&r" (__r) \
> : "r" ((USItype) (__n1)), \
> "r" ((USItype) (__n0)), \
> "r" ((USItype) (__d)))
> @@ -1238,8 +1238,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> instructions scan (ffs from high bit) and divscc. */
> #define umul_ppmm(w1, w0, u, v) \
> __asm__ ("umul %2,%3,%1;rd %%y,%0" \
> - : "=r" ((USItype) (w1)), \
> - "=r" ((USItype) (w0)) \
> + : "=r" (w1), \
> + "=r" (w0) \
> : "r" ((USItype) (u)), \
> "r" ((USItype) (v)))
> #define udiv_qrnnd(q, r, n1, n0, d) \
> @@ -1282,8 +1282,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> " bl,a 1f\n" \
> " add %1,%4,%1\n" \
> "1: ! End of inline udiv_qrnnd" \
> - : "=r" ((USItype) (q)), \
> - "=r" ((USItype) (r)) \
> + : "=r" (q), \
> + "=r" (r) \
> : "r" ((USItype) (n1)), \
> "r" ((USItype) (n0)), \
> "rI" ((USItype) (d)) \
> @@ -1292,7 +1292,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #define count_leading_zeros(count, x) \
> do { \
> __asm__ ("scan %1,1,%0" \
> - : "=r" ((USItype) (count)) \
> + : "=r" (count) \
> : "r" ((USItype) (x))); \
> } while (0)
> /* Early sparclites return 63 for an argument of 0, but they warn that future
> @@ -1342,8 +1342,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> " mulscc %%g1,0,%%g1\n" \
> " add %%g1,%%o5,%0\n" \
> " rd %%y,%1" \
> - : "=r" ((USItype) (w1)), \
> - "=r" ((USItype) (w0)) \
> + : "=r" (w1), \
> + "=r" (w0) \
> : "%rI" ((USItype) (u)), \
> "r" ((USItype) (v)) \
> : "g1", "o5" __AND_CLOBBER_CC)
> @@ -1395,8 +1395,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "add\t%r3,%4,%0\n\t" \
> "movcs\t%%xcc, 1, %2\n\t" \
> "add\t%0, %2, %0" \
> - : "=r" ((UDItype)(sh)), \
> - "=&r" ((UDItype)(sl)), \
> + : "=r" (sh), \
> + "=&r" (sl), \
> "+r" (__carry) \
> : "%rJ" ((UDItype)(ah)), \
> "rI" ((UDItype)(bh)), \
> @@ -1412,8 +1412,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "sub\t%r3,%4,%0\n\t" \
> "movcs\t%%xcc, 1, %2\n\t" \
> "sub\t%0, %2, %0" \
> - : "=r" ((UDItype)(sh)), \
> - "=&r" ((UDItype)(sl)), \
> + : "=r" (sh), \
> + "=&r" (sl), \
> "+r" (__carry) \
> : "%rJ" ((UDItype)(ah)), \
> "rI" ((UDItype)(bh)), \
> @@ -1447,8 +1447,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "sllx %3,32,%3\n\t" \
> "add %1,%3,%1\n\t" \
> "add %5,%2,%0" \
> - : "=r" ((UDItype)(wh)), \
> - "=&r" ((UDItype)(wl)), \
> + : "=r" (wh), \
> + "=&r" (wl), \
> "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
> : "r" ((UDItype)(u)), \
> "r" ((UDItype)(v)) \
> @@ -1461,7 +1461,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> #if defined (__vax__) && W_TYPE_SIZE == 32
> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
> __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \
> - : "=g" ((USItype) (sh)), \
> + : "=g" (sh)), \
> "=&g" ((USItype) (sl)) \
> : "%0" ((USItype) (ah)), \
> "g" ((USItype) (bh)), \
> @@ -1469,7 +1469,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
> "g" ((USItype) (bl)))
> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
> __asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \
> - : "=g" ((USItype) (sh)), \
> + : "=g" (sh)), \
> "=&g" ((USItype) (sl)) \
> : "0" ((USItype) (ah)), \
> "g" ((USItype) (bh)), \
> --
> 2.33.0.882.g93a45727a2-goog
>
On 2021-10-10, Andrew Pinski wrote:
>On Sun, Oct 10, 2021 at 3:15 PM Fangrui Song via Libc-alpha
><libc-alpha@sourceware.org> wrote:
>>
>> An output constraint takes a lvalue. While GCC happily strips the
>> incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
>> default:
>
>This file originally comes from GMP (gmp-6.1.0/longlong.h), does it
>make sense to make sure it has been updated there?
>It is also in GCC too (gcc/include/longlong.h).
>Maybe it is time to resync all three copies, I noticed they are all
>different :).
>
>Thanks,
>Andrew Pinski
Thanks for informing me that they shared the same origin :)
I noticed that this version lacks some removal for some exotic arches
that glibc doesn't support. Anyway, I updated them as well in
https://sourceware.org/git/?p=glibc.git;a=shortlog;h=refs/heads/maskray/clang
I created a gcc patch:
https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581257.html
GCC longlong.h is almost the same as glibc longlong.h.
gmplib longlong.h is 500 lines longer and needs more work.
I don't know how to contribute to gmplib, hope a GCC dev (like you:))
can apply the patch there if acceptable.
>>
>> error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
>> ---
>> stdlib/longlong.h | 126 +++++++++++++++++++++++-----------------------
>> 1 file changed, 63 insertions(+), 63 deletions(-)
>>
>> diff --git a/stdlib/longlong.h b/stdlib/longlong.h
>> index ed22486d8a..2f1c701044 100644
>> --- a/stdlib/longlong.h
>> +++ b/stdlib/longlong.h
>> @@ -194,8 +194,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
>> #if defined (__arc__) && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \
>> - : "=r" ((USItype) (sh)), \
>> - "=&r" ((USItype) (sl)) \
>> + : "=r" (sh), \
>> + "=&r" (sl) \
>> : "%r" ((USItype) (ah)), \
>> "rICal" ((USItype) (bh)), \
>> "%r" ((USItype) (al)), \
>> @@ -203,8 +203,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
>> : "cc")
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \
>> - : "=r" ((USItype) (sh)), \
>> - "=&r" ((USItype) (sl)) \
>> + : "=r" (sh), \
>> + "=&r" (sl) \
>> : "r" ((USItype) (ah)), \
>> "rICal" ((USItype) (bh)), \
>> "r" ((USItype) (al)), \
>> @@ -230,7 +230,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
>> && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%r" ((USItype) (ah)), \
>> "rI" ((USItype) (bh)), \
>> @@ -238,7 +238,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
>> "rI" ((USItype) (bl)) __CLOBBER_CC)
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "r" ((USItype) (ah)), \
>> "rI" ((USItype) (bh)), \
>> @@ -262,8 +262,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
>> " addcs %0, %0, #65536\n" \
>> " adds %1, %1, %3, lsl #16\n" \
>> " adc %0, %0, %3, lsr #16" \
>> - : "=&r" ((USItype) (xh)), \
>> - "=r" ((USItype) (xl)), \
>> + : "=&r" (xh), \
>> + "=r" (xl), \
>> "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
>> : "r" ((USItype) (a)), \
>> "r" ((USItype) (b)) __CLOBBER_CC ); \
>> @@ -348,7 +348,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__hppa) && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%rM" ((USItype) (ah)), \
>> "rM" ((USItype) (bh)), \
>> @@ -356,7 +356,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "rM" ((USItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "rM" ((USItype) (ah)), \
>> "rM" ((USItype) (bh)), \
>> @@ -456,7 +456,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%0" ((USItype) (ah)), \
>> "g" ((USItype) (bh)), \
>> @@ -464,22 +464,22 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "g" ((USItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
>> - : "=r" ((USItype) (sh)), \
>> - "=&r" ((USItype) (sl)) \
>> + : "=r" (sh), \
>> + "=&r" (sl) \
>> : "0" ((USItype) (ah)), \
>> "g" ((USItype) (bh)), \
>> "1" ((USItype) (al)), \
>> "g" ((USItype) (bl)))
>> #define umul_ppmm(w1, w0, u, v) \
>> __asm__ ("mul{l} %3" \
>> - : "=a" ((USItype) (w0)), \
>> - "=d" ((USItype) (w1)) \
>> + : "=a" (w0), \
>> + "=d" (w1) \
>> : "%0" ((USItype) (u)), \
>> "rm" ((USItype) (v)))
>> #define udiv_qrnnd(q, r, n1, n0, dv) \
>> __asm__ ("div{l} %4" \
>> - : "=a" ((USItype) (q)), \
>> - "=d" ((USItype) (r)) \
>> + : "=a" (q), \
>> + "=d" (r) \
>> : "0" ((USItype) (n0)), \
>> "1" ((USItype) (n1)), \
>> "rm" ((USItype) (dv)))
>> @@ -492,30 +492,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__x86_64__) && W_TYPE_SIZE == 64
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
>> - : "=r" ((UDItype) (sh)), \
>> - "=&r" ((UDItype) (sl)) \
>> + : "=r" (sh), \
>> + "=&r" (sl) \
>> : "%0" ((UDItype) (ah)), \
>> "rme" ((UDItype) (bh)), \
>> "%1" ((UDItype) (al)), \
>> "rme" ((UDItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
>> - : "=r" ((UDItype) (sh)), \
>> - "=&r" ((UDItype) (sl)) \
>> + : "=r" (sh), \
>> + "=&r" (sl) \
>> : "0" ((UDItype) (ah)), \
>> "rme" ((UDItype) (bh)), \
>> "1" ((UDItype) (al)), \
>> "rme" ((UDItype) (bl)))
>> #define umul_ppmm(w1, w0, u, v) \
>> __asm__ ("mul{q} %3" \
>> - : "=a" ((UDItype) (w0)), \
>> - "=d" ((UDItype) (w1)) \
>> + : "=a" (w0), \
>> + "=d" (w1) \
>> : "%0" ((UDItype) (u)), \
>> "rm" ((UDItype) (v)))
>> #define udiv_qrnnd(q, r, n1, n0, dv) \
>> __asm__ ("div{q} %4" \
>> - : "=a" ((UDItype) (q)), \
>> - "=d" ((UDItype) (r)) \
>> + : "=a" (q), \
>> + "=d" (r) \
>> : "0" ((UDItype) (n0)), \
>> "1" ((UDItype) (n1)), \
>> "rm" ((UDItype) (dv)))
>> @@ -597,7 +597,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> /* The cmp clears the condition bit. */ \
>> __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "0" ((USItype) (ah)), \
>> "r" ((USItype) (bh)), \
>> @@ -607,7 +607,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> /* The cmp clears the condition bit. */ \
>> __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "0" ((USItype) (ah)), \
>> "r" ((USItype) (bh)), \
>> @@ -688,7 +688,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> " move%.l %/d2,%1\n" \
>> " add%.l %/d1,%/d0\n" \
>> " move%.l %/d0,%0" \
>> - : "=g" ((USItype) (xh)), \
>> + : "=g" (xh)), \
>> "=g" ((USItype) (xl)) \
>> : "g" ((USItype) (a)), \
>> "g" ((USItype) (b)) \
>> @@ -724,7 +724,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> " move%.l %/d2,%1\n" \
>> " add%.l %/d1,%/d0\n" \
>> " move%.l %/d0,%0" \
>> - : "=g" ((USItype) (xh)), \
>> + : "=g" (xh)), \
>> "=g" ((USItype) (xl)) \
>> : "g" ((USItype) (a)), \
>> "g" ((USItype) (b)) \
>> @@ -752,7 +752,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__m88000__) && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%rJ" ((USItype) (ah)), \
>> "rJ" ((USItype) (bh)), \
>> @@ -760,7 +760,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "rJ" ((USItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "rJ" ((USItype) (ah)), \
>> "rJ" ((USItype) (bh)), \
>> @@ -988,7 +988,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("a %1,%5\n\tae %0,%3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%0" ((USItype) (ah)), \
>> "r" ((USItype) (bh)), \
>> @@ -996,7 +996,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "r" ((USItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("s %1,%5\n\tse %0,%3" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "0" ((USItype) (ah)), \
>> "r" ((USItype) (bh)), \
>> @@ -1026,8 +1026,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> " m r2,%3\n" \
>> " cas %0,r2,r0\n" \
>> " mfs r10,%1" \
>> - : "=r" ((USItype) (ph)), \
>> - "=r" ((USItype) (pl)) \
>> + : "=r" (ph), \
>> + "=r" (pl) \
>> : "%r" (__m0), \
>> "r" (__m1) \
>> : "r2"); \
>> @@ -1040,12 +1040,12 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> do { \
>> if ((x) >= 0x10000) \
>> __asm__ ("clz %0,%1" \
>> - : "=r" ((USItype) (count)) \
>> + : "=r" (count) \
>> : "r" ((USItype) (x) >> 16)); \
>> else \
>> { \
>> __asm__ ("clz %0,%1" \
>> - : "=r" ((USItype) (count)) \
>> + : "=r" (count) \
>> : "r" ((USItype) (x))); \
>> (count) += 16; \
>> } \
>> @@ -1107,8 +1107,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #define umul_ppmm(w1, w0, u, v) \
>> __asm__ ( \
>> "dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0" \
>> - : "=r<" ((USItype)(w1)), \
>> - "=r<" ((USItype)(w0)) \
>> + : "=r<" (w1), \
>> + "=r<" (w0) \
>> : "r" ((USItype)(u)), \
>> "r" ((USItype)(v)) \
>> : "macl", "mach")
>> @@ -1179,7 +1179,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "%rJ" ((USItype) (ah)), \
>> "rI" ((USItype) (bh)), \
>> @@ -1188,7 +1188,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> __CLOBBER_CC)
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \
>> - : "=r" ((USItype) (sh)), \
>> + : "=r" (sh), \
>> "=&r" ((USItype) (sl)) \
>> : "rJ" ((USItype) (ah)), \
>> "rI" ((USItype) (bh)), \
>> @@ -1201,7 +1201,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> register USItype __g1 asm ("g1"); \
>> __asm__ ("umul\t%2,%3,%1\n\t" \
>> "srlx\t%1, 32, %0" \
>> - : "=r" ((USItype) (w1)), \
>> + : "=r" (w1), \
>> "=r" (__g1) \
>> : "r" ((USItype) (u)), \
>> "r" ((USItype) (v))); \
>> @@ -1212,8 +1212,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "udiv\t%3,%4,%0\n\t" \
>> "umul\t%0,%4,%1\n\t" \
>> "sub\t%3,%1,%1" \
>> - : "=&r" ((USItype) (__q)), \
>> - "=&r" ((USItype) (__r)) \
>> + : "=&r" (__q), \
>> + "=&r" (__r) \
>> : "r" ((USItype) (__n1)), \
>> "r" ((USItype) (__n0)), \
>> "r" ((USItype) (__d)))
>> @@ -1221,14 +1221,14 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__sparc_v8__)
>> #define umul_ppmm(w1, w0, u, v) \
>> __asm__ ("umul %2,%3,%1;rd %%y,%0" \
>> - : "=r" ((USItype) (w1)), \
>> - "=r" ((USItype) (w0)) \
>> + : "=r" (w1), \
>> + "=r" (w0) \
>> : "r" ((USItype) (u)), \
>> "r" ((USItype) (v)))
>> #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
>> __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
>> - : "=&r" ((USItype) (__q)), \
>> - "=&r" ((USItype) (__r)) \
>> + : "=&r" (__q), \
>> + "=&r" (__r) \
>> : "r" ((USItype) (__n1)), \
>> "r" ((USItype) (__n0)), \
>> "r" ((USItype) (__d)))
>> @@ -1238,8 +1238,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> instructions scan (ffs from high bit) and divscc. */
>> #define umul_ppmm(w1, w0, u, v) \
>> __asm__ ("umul %2,%3,%1;rd %%y,%0" \
>> - : "=r" ((USItype) (w1)), \
>> - "=r" ((USItype) (w0)) \
>> + : "=r" (w1), \
>> + "=r" (w0) \
>> : "r" ((USItype) (u)), \
>> "r" ((USItype) (v)))
>> #define udiv_qrnnd(q, r, n1, n0, d) \
>> @@ -1282,8 +1282,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> " bl,a 1f\n" \
>> " add %1,%4,%1\n" \
>> "1: ! End of inline udiv_qrnnd" \
>> - : "=r" ((USItype) (q)), \
>> - "=r" ((USItype) (r)) \
>> + : "=r" (q), \
>> + "=r" (r) \
>> : "r" ((USItype) (n1)), \
>> "r" ((USItype) (n0)), \
>> "rI" ((USItype) (d)) \
>> @@ -1292,7 +1292,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #define count_leading_zeros(count, x) \
>> do { \
>> __asm__ ("scan %1,1,%0" \
>> - : "=r" ((USItype) (count)) \
>> + : "=r" (count) \
>> : "r" ((USItype) (x))); \
>> } while (0)
>> /* Early sparclites return 63 for an argument of 0, but they warn that future
>> @@ -1342,8 +1342,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> " mulscc %%g1,0,%%g1\n" \
>> " add %%g1,%%o5,%0\n" \
>> " rd %%y,%1" \
>> - : "=r" ((USItype) (w1)), \
>> - "=r" ((USItype) (w0)) \
>> + : "=r" (w1), \
>> + "=r" (w0) \
>> : "%rI" ((USItype) (u)), \
>> "r" ((USItype) (v)) \
>> : "g1", "o5" __AND_CLOBBER_CC)
>> @@ -1395,8 +1395,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "add\t%r3,%4,%0\n\t" \
>> "movcs\t%%xcc, 1, %2\n\t" \
>> "add\t%0, %2, %0" \
>> - : "=r" ((UDItype)(sh)), \
>> - "=&r" ((UDItype)(sl)), \
>> + : "=r" (sh), \
>> + "=&r" (sl), \
>> "+r" (__carry) \
>> : "%rJ" ((UDItype)(ah)), \
>> "rI" ((UDItype)(bh)), \
>> @@ -1412,8 +1412,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "sub\t%r3,%4,%0\n\t" \
>> "movcs\t%%xcc, 1, %2\n\t" \
>> "sub\t%0, %2, %0" \
>> - : "=r" ((UDItype)(sh)), \
>> - "=&r" ((UDItype)(sl)), \
>> + : "=r" (sh), \
>> + "=&r" (sl), \
>> "+r" (__carry) \
>> : "%rJ" ((UDItype)(ah)), \
>> "rI" ((UDItype)(bh)), \
>> @@ -1447,8 +1447,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "sllx %3,32,%3\n\t" \
>> "add %1,%3,%1\n\t" \
>> "add %5,%2,%0" \
>> - : "=r" ((UDItype)(wh)), \
>> - "=&r" ((UDItype)(wl)), \
>> + : "=r" (wh), \
>> + "=&r" (wl), \
>> "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
>> : "r" ((UDItype)(u)), \
>> "r" ((UDItype)(v)) \
>> @@ -1461,7 +1461,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> #if defined (__vax__) && W_TYPE_SIZE == 32
>> #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>> __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \
>> - : "=g" ((USItype) (sh)), \
>> + : "=g" (sh)), \
>> "=&g" ((USItype) (sl)) \
>> : "%0" ((USItype) (ah)), \
>> "g" ((USItype) (bh)), \
>> @@ -1469,7 +1469,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
>> "g" ((USItype) (bl)))
>> #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>> __asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \
>> - : "=g" ((USItype) (sh)), \
>> + : "=g" (sh)), \
>> "=&g" ((USItype) (sl)) \
>> : "0" ((USItype) (ah)), \
>> "g" ((USItype) (bh)), \
>> --
>> 2.33.0.882.g93a45727a2-goog
>>
Hi Fangrui,
> I don't know how to contribute to gmplib, hope a GCC dev (like you:))
> can apply the patch there if acceptable.
I have posted to the gmp-devel list:
https://gmplib.org/list-archives/gmp-devel/2021-October/006049.html
Paul
On Sun, 10 Oct 2021, Fangrui Song via Libc-alpha wrote:
> GCC longlong.h is almost the same as glibc longlong.h.
> gmplib longlong.h is 500 lines longer and needs more work.
> I don't know how to contribute to gmplib, hope a GCC dev (like you:))
> can apply the patch there if acceptable.
The GMP version diverged a very long time ago and now has a different
license, so probably isn't suitable for merging code to GCC or glibc.
* Fangrui Song via Libc-alpha:
> An output constraint takes a lvalue. While GCC happily strips the
> incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
> default:
>
> error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
As I wrote on the gcc-patches list, these casts may be needed in a few
cases. Just removing them may not be entirely correct.
Dear Joseph,
there was no change in the license from GMP 6.1.0 to the current version
(6.2.1). It is either under LGPL v3+ or GPL v2+ (at the user choice).
Thus if the version in the glibc is from GMP 6.1.0, we can update to the
current version.
Paul
> Date: Mon, 11 Oct 2021 21:58:52 +0000
> From: Joseph Myers <joseph@codesourcery.com>
> User-Agent: Alpine 2.22 (DEB 394 2020-01-19)
> Cc: GNU C Library <libc-alpha@sourceware.org>
>
> On Sun, 10 Oct 2021, Fangrui Song via Libc-alpha wrote:
>
> > GCC longlong.h is almost the same as glibc longlong.h.
> > gmplib longlong.h is 500 lines longer and needs more work.
> > I don't know how to contribute to gmplib, hope a GCC dev (like you:))
> > can apply the patch there if acceptable.
>
> The GMP version diverged a very long time ago and now has a different
> license, so probably isn't suitable for merging code to GCC or glibc.
>
> --
> Joseph S. Myers
> joseph@codesourcery.com
>
On Mon, Oct 11, 2021 at 11:37 PM Florian Weimer <fw@deneb.enyo.de> wrote:
>
> * Fangrui Song via Libc-alpha:
>
> > An output constraint takes a lvalue. While GCC happily strips the
> > incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
> > default:
> >
> > error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
>
> As I wrote on the gcc-patches list, these casts may be needed in a few
> cases. Just removing them may not be entirely correct.
You meant https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581265.html
"This seems to alter the meanining of existing programs if sh and sl do
not have the expected type.
I think you need to add a compound expression and temporaries of type
USItype if you want to avoid the cast."
I tested this on x86-64 and aarch64 and saw no new failure.
If the concern is with exotic architectures like arc which we don't
have a good story, I can drop changes to these exotic architectures.
In addition, using a compound statement sorta defeats the purpose to
simplify the code.
* Fāng-ruì Sòng:
> On Mon, Oct 11, 2021 at 11:37 PM Florian Weimer <fw@deneb.enyo.de> wrote:
>>
>> * Fangrui Song via Libc-alpha:
>>
>> > An output constraint takes a lvalue. While GCC happily strips the
>> > incorrect lvalue to rvalue conversion, Clang Clang rejects the code by
>> > default:
>> >
>> > error: invalid use of a cast in a inline asm context requiring an lvalue: remove the cast or build with -fheinous-gnu-extensions
>>
>> As I wrote on the gcc-patches list, these casts may be needed in a few
>> cases. Just removing them may not be entirely correct.
>
> You meant https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581265.html
>
> "This seems to alter the meanining of existing programs if sh and sl do
> not have the expected type.
> I think you need to add a compound expression and temporaries of type
> USItype if you want to avoid the cast."
>
>
> I tested this on x86-64 and aarch64 and saw no new failure.
It's probably not possible to show conclusively using testing alone
that the change is safe. A type mismatch can only show up with
certain GCC versions or optimization levels.
The definitions of mp_limb_t and USItype are unfortunately different,
so it is hard to tell if all uses of these macros are still correct.
> In addition, using a compound statement sorta defeats the purpose to
> simplify the code.
I thought the actual goal was to get this to compile with Clang?
Clang does not support typed asm output operands, so the code is going
to turn more complex.
On Tue, 12 Oct 2021, Paul Zimmermann wrote:
> there was no change in the license from GMP 6.1.0 to the current version
> (6.2.1). It is either under LGPL v3+ or GPL v2+ (at the user choice).
longlong.h in glibc and GCC is LGPL v2.1+ with the libgcc exception.
> Thus if the version in the glibc is from GMP 6.1.0, we can update to the
> current version.
I don't know where that version number came from, but it's not the right
one. The GCC and glibc versions of longlong.h diverged from the GMP
version around GMP 2.0 (released 1996), not 6.1.0.
@@ -194,8 +194,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
#if defined (__arc__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%r" ((USItype) (ah)), \
"rICal" ((USItype) (bh)), \
"%r" ((USItype) (al)), \
@@ -203,8 +203,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
: "cc")
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "r" ((USItype) (ah)), \
"rICal" ((USItype) (bh)), \
"r" ((USItype) (al)), \
@@ -230,7 +230,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
&& W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
@@ -238,7 +238,7 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
"rI" ((USItype) (bl)) __CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
@@ -262,8 +262,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
" addcs %0, %0, #65536\n" \
" adds %1, %1, %3, lsl #16\n" \
" adc %0, %0, %3, lsr #16" \
- : "=&r" ((USItype) (xh)), \
- "=r" ((USItype) (xl)), \
+ : "=&r" (xh), \
+ "=r" (xl), \
"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
: "r" ((USItype) (a)), \
"r" ((USItype) (b)) __CLOBBER_CC ); \
@@ -348,7 +348,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__hppa) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%rM" ((USItype) (ah)), \
"rM" ((USItype) (bh)), \
@@ -356,7 +356,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
"rM" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "rM" ((USItype) (ah)), \
"rM" ((USItype) (bh)), \
@@ -456,7 +456,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
@@ -464,22 +464,22 @@ extern UDItype __umulsidi3 (USItype, USItype);
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
"1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{l} %3" \
- : "=a" ((USItype) (w0)), \
- "=d" ((USItype) (w1)) \
+ : "=a" (w0), \
+ "=d" (w1) \
: "%0" ((USItype) (u)), \
"rm" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{l} %4" \
- : "=a" ((USItype) (q)), \
- "=d" ((USItype) (r)) \
+ : "=a" (q), \
+ "=d" (r) \
: "0" ((USItype) (n0)), \
"1" ((USItype) (n1)), \
"rm" ((USItype) (dv)))
@@ -492,30 +492,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__x86_64__) && W_TYPE_SIZE == 64
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
- : "=r" ((UDItype) (sh)), \
- "=&r" ((UDItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \
"%1" ((UDItype) (al)), \
"rme" ((UDItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
- : "=r" ((UDItype) (sh)), \
- "=&r" ((UDItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \
"1" ((UDItype) (al)), \
"rme" ((UDItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{q} %3" \
- : "=a" ((UDItype) (w0)), \
- "=d" ((UDItype) (w1)) \
+ : "=a" (w0), \
+ "=d" (w1) \
: "%0" ((UDItype) (u)), \
"rm" ((UDItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{q} %4" \
- : "=a" ((UDItype) (q)), \
- "=d" ((UDItype) (r)) \
+ : "=a" (q), \
+ "=d" (r) \
: "0" ((UDItype) (n0)), \
"1" ((UDItype) (n1)), \
"rm" ((UDItype) (dv)))
@@ -597,7 +597,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
__asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
@@ -607,7 +607,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
__asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
@@ -688,7 +688,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
" move%.l %/d2,%1\n" \
" add%.l %/d1,%/d0\n" \
" move%.l %/d0,%0" \
- : "=g" ((USItype) (xh)), \
+ : "=g" (xh)), \
"=g" ((USItype) (xl)) \
: "g" ((USItype) (a)), \
"g" ((USItype) (b)) \
@@ -724,7 +724,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
" move%.l %/d2,%1\n" \
" add%.l %/d1,%/d0\n" \
" move%.l %/d0,%0" \
- : "=g" ((USItype) (xh)), \
+ : "=g" (xh)), \
"=g" ((USItype) (xl)) \
: "g" ((USItype) (a)), \
"g" ((USItype) (b)) \
@@ -752,7 +752,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__m88000__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%rJ" ((USItype) (ah)), \
"rJ" ((USItype) (bh)), \
@@ -760,7 +760,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
"rJ" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "rJ" ((USItype) (ah)), \
"rJ" ((USItype) (bh)), \
@@ -988,7 +988,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("a %1,%5\n\tae %0,%3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
@@ -996,7 +996,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
"r" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("s %1,%5\n\tse %0,%3" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
@@ -1026,8 +1026,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" m r2,%3\n" \
" cas %0,r2,r0\n" \
" mfs r10,%1" \
- : "=r" ((USItype) (ph)), \
- "=r" ((USItype) (pl)) \
+ : "=r" (ph), \
+ "=r" (pl) \
: "%r" (__m0), \
"r" (__m1) \
: "r2"); \
@@ -1040,12 +1040,12 @@ extern UDItype __umulsidi3 (USItype, USItype);
do { \
if ((x) >= 0x10000) \
__asm__ ("clz %0,%1" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x) >> 16)); \
else \
{ \
__asm__ ("clz %0,%1" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x))); \
(count) += 16; \
} \
@@ -1107,8 +1107,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define umul_ppmm(w1, w0, u, v) \
__asm__ ( \
"dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0" \
- : "=r<" ((USItype)(w1)), \
- "=r<" ((USItype)(w0)) \
+ : "=r<" (w1), \
+ "=r<" (w0) \
: "r" ((USItype)(u)), \
"r" ((USItype)(v)) \
: "macl", "mach")
@@ -1179,7 +1179,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
&& W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "%rJ" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
@@ -1188,7 +1188,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
__CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \
- : "=r" ((USItype) (sh)), \
+ : "=r" (sh), \
"=&r" ((USItype) (sl)) \
: "rJ" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
@@ -1201,7 +1201,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
register USItype __g1 asm ("g1"); \
__asm__ ("umul\t%2,%3,%1\n\t" \
"srlx\t%1, 32, %0" \
- : "=r" ((USItype) (w1)), \
+ : "=r" (w1), \
"=r" (__g1) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v))); \
@@ -1212,8 +1212,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"udiv\t%3,%4,%0\n\t" \
"umul\t%0,%4,%1\n\t" \
"sub\t%3,%1,%1" \
- : "=&r" ((USItype) (__q)), \
- "=&r" ((USItype) (__r)) \
+ : "=&r" (__q), \
+ "=&r" (__r) \
: "r" ((USItype) (__n1)), \
"r" ((USItype) (__n0)), \
"r" ((USItype) (__d)))
@@ -1221,14 +1221,14 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__sparc_v8__)
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v)))
#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
__asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
- : "=&r" ((USItype) (__q)), \
- "=&r" ((USItype) (__r)) \
+ : "=&r" (__q), \
+ "=&r" (__r) \
: "r" ((USItype) (__n1)), \
"r" ((USItype) (__n0)), \
"r" ((USItype) (__d)))
@@ -1238,8 +1238,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
instructions scan (ffs from high bit) and divscc. */
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, d) \
@@ -1282,8 +1282,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" bl,a 1f\n" \
" add %1,%4,%1\n" \
"1: ! End of inline udiv_qrnnd" \
- : "=r" ((USItype) (q)), \
- "=r" ((USItype) (r)) \
+ : "=r" (q), \
+ "=r" (r) \
: "r" ((USItype) (n1)), \
"r" ((USItype) (n0)), \
"rI" ((USItype) (d)) \
@@ -1292,7 +1292,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define count_leading_zeros(count, x) \
do { \
__asm__ ("scan %1,1,%0" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x))); \
} while (0)
/* Early sparclites return 63 for an argument of 0, but they warn that future
@@ -1342,8 +1342,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" mulscc %%g1,0,%%g1\n" \
" add %%g1,%%o5,%0\n" \
" rd %%y,%1" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "%rI" ((USItype) (u)), \
"r" ((USItype) (v)) \
: "g1", "o5" __AND_CLOBBER_CC)
@@ -1395,8 +1395,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"add\t%r3,%4,%0\n\t" \
"movcs\t%%xcc, 1, %2\n\t" \
"add\t%0, %2, %0" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)), \
+ : "=r" (sh), \
+ "=&r" (sl), \
"+r" (__carry) \
: "%rJ" ((UDItype)(ah)), \
"rI" ((UDItype)(bh)), \
@@ -1412,8 +1412,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"sub\t%r3,%4,%0\n\t" \
"movcs\t%%xcc, 1, %2\n\t" \
"sub\t%0, %2, %0" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)), \
+ : "=r" (sh), \
+ "=&r" (sl), \
"+r" (__carry) \
: "%rJ" ((UDItype)(ah)), \
"rI" ((UDItype)(bh)), \
@@ -1447,8 +1447,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"sllx %3,32,%3\n\t" \
"add %1,%3,%1\n\t" \
"add %5,%2,%0" \
- : "=r" ((UDItype)(wh)), \
- "=&r" ((UDItype)(wl)), \
+ : "=r" (wh), \
+ "=&r" (wl), \
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
: "r" ((UDItype)(u)), \
"r" ((UDItype)(v)) \
@@ -1461,7 +1461,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__vax__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addl2 %5,%1\n\tadwc %3,%0" \
- : "=g" ((USItype) (sh)), \
+ : "=g" (sh)), \
"=&g" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
@@ -1469,7 +1469,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \
- : "=g" ((USItype) (sh)), \
+ : "=g" (sh)), \
"=&g" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \