x86-64: Remove assembler AVX512DQ check
Checks
Commit Message
The minimum GNU binutils requirement is 2.25 which supports AVX512DQ.
Remove assembler AVX512DQ check.
---
config.h.in | 3 ---
sysdeps/x86_64/configure | 27 -------------------
sysdeps/x86_64/configure.ac | 15 -----------
.../fpu/multiarch/svml_d_cos8_core_avx512.S | 8 ------
.../fpu/multiarch/svml_d_exp8_core_avx512.S | 8 ------
.../fpu/multiarch/svml_d_log8_core_avx512.S | 8 ------
.../fpu/multiarch/svml_d_pow8_core_avx512.S | 8 ------
.../fpu/multiarch/svml_d_sin8_core_avx512.S | 8 ------
.../multiarch/svml_d_sincos8_core_avx512.S | 8 ------
.../fpu/multiarch/svml_s_cosf16_core_avx512.S | 8 ------
.../fpu/multiarch/svml_s_expf16_core_avx512.S | 8 ------
.../fpu/multiarch/svml_s_logf16_core_avx512.S | 8 ------
.../fpu/multiarch/svml_s_powf16_core_avx512.S | 8 ------
.../multiarch/svml_s_sincosf16_core_avx512.S | 8 ------
.../fpu/multiarch/svml_s_sinf16_core_avx512.S | 8 ------
15 files changed, 141 deletions(-)
Comments
On Fri, Aug 20, 2021 at 6:51 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> The minimum GNU binutils requirement is 2.25 which supports AVX512DQ.
> Remove assembler AVX512DQ check.
> ---
> config.h.in | 3 ---
> sysdeps/x86_64/configure | 27 -------------------
> sysdeps/x86_64/configure.ac | 15 -----------
> .../fpu/multiarch/svml_d_cos8_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_d_exp8_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_d_log8_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_d_pow8_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_d_sin8_core_avx512.S | 8 ------
> .../multiarch/svml_d_sincos8_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_s_cosf16_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_s_expf16_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_s_logf16_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_s_powf16_core_avx512.S | 8 ------
> .../multiarch/svml_s_sincosf16_core_avx512.S | 8 ------
> .../fpu/multiarch/svml_s_sinf16_core_avx512.S | 8 ------
> 15 files changed, 141 deletions(-)
>
> diff --git a/config.h.in b/config.h.in
> index 3752f9a6f7..964873f27e 100644
> --- a/config.h.in
> +++ b/config.h.in
> @@ -62,9 +62,6 @@
> /* Define if _rtld_local structure should be forced into .sdata section. */
> #undef HAVE_SDATA_SECTION
>
> -/* Define if assembler supports AVX512DQ. */
> -#undef HAVE_AVX512DQ_ASM_SUPPORT
> -
> /* Define if assembler supports z10 zarch instructions as default on S390. */
> #undef HAVE_S390_MIN_Z10_ZARCH_ASM_SUPPORT
>
> diff --git a/sysdeps/x86_64/configure b/sysdeps/x86_64/configure
> index d81accdc07..585279f83d 100755
> --- a/sysdeps/x86_64/configure
> +++ b/sysdeps/x86_64/configure
> @@ -1,33 +1,6 @@
> # This file is generated from configure.ac by Autoconf. DO NOT EDIT!
> # Local configure fragment for sysdeps/x86_64.
>
> -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AVX512DQ support in assembler" >&5
> -$as_echo_n "checking for AVX512DQ support in assembler... " >&6; }
> -if ${libc_cv_asm_avx512dq+:} false; then :
> - $as_echo_n "(cached) " >&6
> -else
> - cat > conftest.s <<\EOF
> - vandpd (%rax), %zmm6, %zmm1
> -EOF
> -if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
> - { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
> - (eval $ac_try) 2>&5
> - ac_status=$?
> - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
> - test $ac_status = 0; }; }; then
> - libc_cv_asm_avx512dq=yes
> -else
> - libc_cv_asm_avx512dq=no
> -fi
> -rm -f conftest*
> -fi
> -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_avx512dq" >&5
> -$as_echo "$libc_cv_asm_avx512dq" >&6; }
> -if test $libc_cv_asm_avx512dq = yes; then
> - $as_echo "#define HAVE_AVX512DQ_ASM_SUPPORT 1" >>confdefs.h
> -
> -fi
> -
> { $as_echo "$as_me:${as_lineno-$LINENO}: checking -mprefer-vector-width=128" >&5
> $as_echo_n "checking -mprefer-vector-width=128... " >&6; }
> if ${libc_cv_cc_mprefer_vector_width+:} false; then :
> diff --git a/sysdeps/x86_64/configure.ac b/sysdeps/x86_64/configure.ac
> index 41baed6999..29e14033c0 100644
> --- a/sysdeps/x86_64/configure.ac
> +++ b/sysdeps/x86_64/configure.ac
> @@ -1,21 +1,6 @@
> GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
> # Local configure fragment for sysdeps/x86_64.
>
> -dnl Check if asm supports AVX512DQ.
> -AC_CACHE_CHECK(for AVX512DQ support in assembler, libc_cv_asm_avx512dq, [dnl
> -cat > conftest.s <<\EOF
> - vandpd (%rax), %zmm6, %zmm1
> -EOF
> -if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
> - libc_cv_asm_avx512dq=yes
> -else
> - libc_cv_asm_avx512dq=no
> -fi
> -rm -f conftest*])
> -if test $libc_cv_asm_avx512dq = yes; then
> - AC_DEFINE(HAVE_AVX512DQ_ASM_SUPPORT)
> -fi
> -
> dnl Check if -mprefer-vector-width=128 works.
> AC_CACHE_CHECK(-mprefer-vector-width=128, libc_cv_cc_mprefer_vector_width, [dnl
> LIBC_TRY_CC_OPTION([-mprefer-vector-width=128],
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
> index e68fcdbb16..c2cf007904 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN8v_cos_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -232,13 +229,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
> call JUMPTARGET(cos)
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN8v_cos_knl)
>
> ENTRY (_ZGVeN8v_cos_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -454,7 +447,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
>
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN8v_cos_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S
> index 5181b12043..c40d82bf65 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN8v_exp_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -234,13 +231,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
> call JUMPTARGET(exp)
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN8v_exp_knl)
>
> ENTRY (_ZGVeN8v_exp_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -452,5 +445,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_2_7
>
> -#endif
> END (_ZGVeN8v_exp_skx)
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
> index dfa2acafc4..e9a5d00992 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN8v_log_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_log
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
> call JUMPTARGET(log)
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN8v_log_knl)
>
> ENTRY (_ZGVeN8v_log_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_log
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -459,7 +452,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
>
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN8v_log_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S
> index d70b4d6061..6062ec8718 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S
> @@ -82,9 +82,6 @@
>
> .text
> ENTRY (_ZGVeN8vv_pow_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -405,13 +402,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
> vmovsd %xmm0, 1280(%rsp,%r15)
> jmp .LBL_1_7
>
> -#endif
> END (_ZGVeN8vv_pow_knl)
>
> ENTRY (_ZGVeN8vv_pow_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -737,5 +730,4 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
> vmovsd %xmm0, 1280(%rsp,%r15)
> jmp .LBL_2_7
>
> -#endif
> END (_ZGVeN8vv_pow_skx)
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
> index be8ab7c6e0..508da563fe 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN8v_sin_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
> call JUMPTARGET(sin)
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN8v_sin_knl)
>
> ENTRY (_ZGVeN8v_sin_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -456,7 +449,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
>
> vmovsd %xmm0, 1216(%rsp,%r15)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN8v_sin_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
> index 611887082a..965415f2bd 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
> @@ -37,9 +37,6 @@
>
> .text
> ENTRY (_ZGVeN8vl8l8_sincos_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -303,14 +300,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
> vmovsd %xmm0, 1280(%rsp,%r15)
> jmp .LBL_1_7
>
> -#endif
> END (_ZGVeN8vl8l8_sincos_knl)
> libmvec_hidden_def(_ZGVeN8vl8l8_sincos_knl)
>
> ENTRY (_ZGVeN8vl8l8_sincos_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -585,7 +578,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
> vmovsd %xmm0, 1280(%rsp,%r15)
> jmp .LBL_2_7
>
> -#endif
> END (_ZGVeN8vl8l8_sincos_skx)
> libmvec_hidden_def(_ZGVeN8vl8l8_sincos_skx)
>
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
> index f671d60d5d..cdcb16087d 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN16v_cosf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -235,13 +232,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
> call JUMPTARGET(cosf)
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN16v_cosf_knl)
>
> ENTRY (_ZGVeN16v_cosf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -451,7 +444,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
> call JUMPTARGET(cosf)
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN16v_cosf_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
> index 637bfe3c06..1b09909344 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN16v_expf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -223,13 +220,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_1_7
>
> -#endif
> END (_ZGVeN16v_expf_knl)
>
> ENTRY (_ZGVeN16v_expf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -438,7 +431,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_2_7
>
> -#endif
> END (_ZGVeN16v_expf_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
> index 9d790fbf0a..4a7b2adbbf 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY (_ZGVeN16v_logf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -207,13 +204,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
> call JUMPTARGET(logf)
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN16v_logf_knl)
>
> ENTRY (_ZGVeN16v_logf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -407,7 +400,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_2_7
>
> -#endif
> END (_ZGVeN16v_logf_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
> index c5c43c46ff..7f906622a5 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
> @@ -82,9 +82,6 @@
>
> .text
> ENTRY (_ZGVeN16vv_powf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -355,13 +352,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
> call JUMPTARGET(powf)
> vmovss %xmm0, 1280(%rsp,%r15,8)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN16vv_powf_knl)
>
> ENTRY (_ZGVeN16vv_powf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -641,7 +634,6 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
> call JUMPTARGET(powf)
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN16vv_powf_skx)
>
> .section .rodata, "a"
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
> index 9cf359c86f..54cee3a537 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
> @@ -50,9 +50,6 @@
>
> .text
> ENTRY (_ZGVeN16vl4l4_sincosf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -266,14 +263,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
>
> vmovss %xmm0, 1280(%rsp,%r15,8)
> jmp .LBL_1_7
> -#endif
> END (_ZGVeN16vl4l4_sincosf_knl)
> libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_knl)
>
> ENTRY (_ZGVeN16vl4l4_sincosf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
> -#else
> pushq %rbp
> cfi_adjust_cfa_offset (8)
> cfi_rel_offset (%rbp, 0)
> @@ -496,7 +489,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
>
> vmovss %xmm0, 1280(%rsp,%r15,8)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN16vl4l4_sincosf_skx)
> libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_skx)
>
> diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
> index bd05109a62..ec65ffdce5 100644
> --- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
> +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
> @@ -22,9 +22,6 @@
>
> .text
> ENTRY(_ZGVeN16v_sinf_knl)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -239,13 +236,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
> call JUMPTARGET(sinf)
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_1_7
> -#endif
> END(_ZGVeN16v_sinf_knl)
>
> ENTRY (_ZGVeN16v_sinf_skx)
> -#ifndef HAVE_AVX512DQ_ASM_SUPPORT
> -WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
> -#else
> /*
> ALGORITHM DESCRIPTION:
>
> @@ -470,7 +463,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
>
> vmovss %xmm0, 1216(%rsp,%r15,8)
> jmp .LBL_2_7
> -#endif
> END (_ZGVeN16v_sinf_skx)
>
> .section .rodata, "a"
> --
> 2.31.1
>
I am checking in this patch.
@@ -62,9 +62,6 @@
/* Define if _rtld_local structure should be forced into .sdata section. */
#undef HAVE_SDATA_SECTION
-/* Define if assembler supports AVX512DQ. */
-#undef HAVE_AVX512DQ_ASM_SUPPORT
-
/* Define if assembler supports z10 zarch instructions as default on S390. */
#undef HAVE_S390_MIN_Z10_ZARCH_ASM_SUPPORT
@@ -1,33 +1,6 @@
# This file is generated from configure.ac by Autoconf. DO NOT EDIT!
# Local configure fragment for sysdeps/x86_64.
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AVX512DQ support in assembler" >&5
-$as_echo_n "checking for AVX512DQ support in assembler... " >&6; }
-if ${libc_cv_asm_avx512dq+:} false; then :
- $as_echo_n "(cached) " >&6
-else
- cat > conftest.s <<\EOF
- vandpd (%rax), %zmm6, %zmm1
-EOF
-if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5'
- { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
- (eval $ac_try) 2>&5
- ac_status=$?
- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
- test $ac_status = 0; }; }; then
- libc_cv_asm_avx512dq=yes
-else
- libc_cv_asm_avx512dq=no
-fi
-rm -f conftest*
-fi
-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_avx512dq" >&5
-$as_echo "$libc_cv_asm_avx512dq" >&6; }
-if test $libc_cv_asm_avx512dq = yes; then
- $as_echo "#define HAVE_AVX512DQ_ASM_SUPPORT 1" >>confdefs.h
-
-fi
-
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking -mprefer-vector-width=128" >&5
$as_echo_n "checking -mprefer-vector-width=128... " >&6; }
if ${libc_cv_cc_mprefer_vector_width+:} false; then :
@@ -1,21 +1,6 @@
GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
# Local configure fragment for sysdeps/x86_64.
-dnl Check if asm supports AVX512DQ.
-AC_CACHE_CHECK(for AVX512DQ support in assembler, libc_cv_asm_avx512dq, [dnl
-cat > conftest.s <<\EOF
- vandpd (%rax), %zmm6, %zmm1
-EOF
-if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then
- libc_cv_asm_avx512dq=yes
-else
- libc_cv_asm_avx512dq=no
-fi
-rm -f conftest*])
-if test $libc_cv_asm_avx512dq = yes; then
- AC_DEFINE(HAVE_AVX512DQ_ASM_SUPPORT)
-fi
-
dnl Check if -mprefer-vector-width=128 works.
AC_CACHE_CHECK(-mprefer-vector-width=128, libc_cv_cc_mprefer_vector_width, [dnl
LIBC_TRY_CC_OPTION([-mprefer-vector-width=128],
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN8v_cos_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
-#else
/*
ALGORITHM DESCRIPTION:
@@ -232,13 +229,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
call JUMPTARGET(cos)
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8v_cos_knl)
ENTRY (_ZGVeN8v_cos_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
-#else
/*
ALGORITHM DESCRIPTION:
@@ -454,7 +447,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_cos
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8v_cos_skx)
.section .rodata, "a"
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN8v_exp_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
-#else
/*
ALGORITHM DESCRIPTION:
@@ -234,13 +231,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
call JUMPTARGET(exp)
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8v_exp_knl)
ENTRY (_ZGVeN8v_exp_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
-#else
/*
ALGORITHM DESCRIPTION:
@@ -452,5 +445,4 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_exp
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8v_exp_skx)
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN8v_log_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_log
-#else
/*
ALGORITHM DESCRIPTION:
@@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
call JUMPTARGET(log)
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8v_log_knl)
ENTRY (_ZGVeN8v_log_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_log
-#else
/*
ALGORITHM DESCRIPTION:
@@ -459,7 +452,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_log
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8v_log_skx)
.section .rodata, "a"
@@ -82,9 +82,6 @@
.text
ENTRY (_ZGVeN8vv_pow_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -405,13 +402,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
vmovsd %xmm0, 1280(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8vv_pow_knl)
ENTRY (_ZGVeN8vv_pow_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -737,5 +730,4 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN4vv_pow
vmovsd %xmm0, 1280(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8vv_pow_skx)
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN8v_sin_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
-#else
/*
ALGORITHM DESCRIPTION:
@@ -233,13 +230,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
call JUMPTARGET(sin)
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8v_sin_knl)
ENTRY (_ZGVeN8v_sin_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
-#else
/*
ALGORITHM DESCRIPTION:
@@ -456,7 +449,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN4v_sin
vmovsd %xmm0, 1216(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8v_sin_skx)
.section .rodata, "a"
@@ -37,9 +37,6 @@
.text
ENTRY (_ZGVeN8vl8l8_sincos_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -303,14 +300,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
vmovsd %xmm0, 1280(%rsp,%r15)
jmp .LBL_1_7
-#endif
END (_ZGVeN8vl8l8_sincos_knl)
libmvec_hidden_def(_ZGVeN8vl8l8_sincos_knl)
ENTRY (_ZGVeN8vl8l8_sincos_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -585,7 +578,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN4vl8l8_sincos
vmovsd %xmm0, 1280(%rsp,%r15)
jmp .LBL_2_7
-#endif
END (_ZGVeN8vl8l8_sincos_skx)
libmvec_hidden_def(_ZGVeN8vl8l8_sincos_skx)
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN16v_cosf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -235,13 +232,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
call JUMPTARGET(cosf)
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END (_ZGVeN16v_cosf_knl)
ENTRY (_ZGVeN16v_cosf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -451,7 +444,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_cosf
call JUMPTARGET(cosf)
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16v_cosf_skx)
.section .rodata, "a"
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN16v_expf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -223,13 +220,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END (_ZGVeN16v_expf_knl)
ENTRY (_ZGVeN16v_expf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -438,7 +431,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_expf
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16v_expf_skx)
.section .rodata, "a"
@@ -22,9 +22,6 @@
.text
ENTRY (_ZGVeN16v_logf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -207,13 +204,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
call JUMPTARGET(logf)
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END (_ZGVeN16v_logf_knl)
ENTRY (_ZGVeN16v_logf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -407,7 +400,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_logf
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16v_logf_skx)
.section .rodata, "a"
@@ -82,9 +82,6 @@
.text
ENTRY (_ZGVeN16vv_powf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -355,13 +352,9 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
call JUMPTARGET(powf)
vmovss %xmm0, 1280(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END (_ZGVeN16vv_powf_knl)
ENTRY (_ZGVeN16vv_powf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -641,7 +634,6 @@ WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
call JUMPTARGET(powf)
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16vv_powf_skx)
.section .rodata, "a"
@@ -50,9 +50,6 @@
.text
ENTRY (_ZGVeN16vl4l4_sincosf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -266,14 +263,10 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vl4l4_sincosf
vmovss %xmm0, 1280(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END (_ZGVeN16vl4l4_sincosf_knl)
libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_knl)
ENTRY (_ZGVeN16vl4l4_sincosf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
-#else
pushq %rbp
cfi_adjust_cfa_offset (8)
cfi_rel_offset (%rbp, 0)
@@ -496,7 +489,6 @@ WRAPPER_IMPL_AVX512_fFF _ZGVdN8vvv_sincosf
vmovss %xmm0, 1280(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16vl4l4_sincosf_skx)
libmvec_hidden_def(_ZGVeN16vl4l4_sincosf_skx)
@@ -22,9 +22,6 @@
.text
ENTRY(_ZGVeN16v_sinf_knl)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -239,13 +236,9 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
call JUMPTARGET(sinf)
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_1_7
-#endif
END(_ZGVeN16v_sinf_knl)
ENTRY (_ZGVeN16v_sinf_skx)
-#ifndef HAVE_AVX512DQ_ASM_SUPPORT
-WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
-#else
/*
ALGORITHM DESCRIPTION:
@@ -470,7 +463,6 @@ WRAPPER_IMPL_AVX512 _ZGVdN8v_sinf
vmovss %xmm0, 1216(%rsp,%r15,8)
jmp .LBL_2_7
-#endif
END (_ZGVeN16v_sinf_skx)
.section .rodata, "a"