Message ID | 20201128081817.15463-3-huangpei@loongson.cn |
---|---|
State | Superseded |
Headers |
Return-Path: <libc-alpha-bounces@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 054463858010; Sat, 28 Nov 2020 08:18:46 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 961B63858010 for <libc-alpha@sourceware.org>; Sat, 28 Nov 2020 08:18:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 961B63858010 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=huangpei@loongson.cn Received: from localhost.localdomain (unknown [182.149.161.68]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9AxetHVB8Jf7NEXAA--.15226S4; Sat, 28 Nov 2020 16:18:38 +0800 (CST) From: Huang Pei <huangpei@loongson.cn> To: Joseph Myers <joseph@codesourcery.com> Subject: [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32 Date: Sat, 28 Nov 2020 16:18:16 +0800 Message-Id: <20201128081817.15463-3-huangpei@loongson.cn> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201128081817.15463-1-huangpei@loongson.cn> References: <20201128081817.15463-1-huangpei@loongson.cn> X-CM-TRANSID: AQAAf9AxetHVB8Jf7NEXAA--.15226S4 X-Coremail-Antispam: 1UD129KBjvdXoWrtF48JF1fXr1rKw1ftw4ruFg_yoWDurc_Gr WFvr18WrW5XrW7Ja4fXryDA34rKw4DXryfZFn2kFn7Wry5JrZY9FnrZrW8ZF1UWFW8GFn8 Jwn5A34rGFWa9jkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUbhxFF20E14v26r4j6ryUM7CY07I20VC2zVCF04k26cxKx2IYs7xG 6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI8067AKxVWUXwA2048vs2IY02 0Ec7CjxVAFwI0_JFI_Gr1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVWUJVWUCwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc2xSY4AK67AK6r43MxAIw2 8IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4l x2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrw CI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI 42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z2 80aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUjNtxDUUUUU== X-CM-SenderInfo: xkxd0whshlqz5rrqw2lrqou0/ X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list <libc-alpha.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/libc-alpha/> List-Post: <mailto:libc-alpha@sourceware.org> List-Help: <mailto:libc-alpha-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=subscribe> Cc: Huacai Chen <chenhc@lemote.com>, Chenghua Xu <xuchenghua@loongson.cn>, libc-alpha <libc-alpha@sourceware.org> Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org> |
Series |
[1/3] mips: add hp-timing support for MIPS R2
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Commit Message
Huang Pei
Nov. 28, 2020, 8:18 a.m. UTC
MIPS N64/N32 ABI request stack pointer be 16-byte alinged
Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
Comments
On 28/11/2020 05:18, Huang Pei wrote: > MIPS N64/N32 ABI request stack pointer be 16-byte alinged > It seems to align what gcc assumes: gcc/config/mips/mips.h 364 #define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64) 2525 /* Treat LOC as a byte offset from the stack pointer and round it up 2526 to the next fully-aligned offset. */ 2527 #define MIPS_STACK_ALIGN(LOC) \ 2528 (TARGET_NEWABI ? ROUND_UP ((LOC), 16) : ROUND_UP ((LOC), 8)) (It would be easier that https://www.linux-mips.org/ could show this information easier, I could only find the old o32 ABI documentation). > Signed-off-by: Huang Pei <huangpei@loongson.cn> We do not use SCO, but rather Copyright assignments. Patch looks ok regardless. > --- > sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S > index a9baff3c17..aab1f389aa 100644 > --- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S > +++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S > @@ -27,10 +27,10 @@ > > .text > NESTED (syscall, SZREG, ra) > - .mask 0x00010000, -SZREG > + .mask 0x00010000, -2 * SZREG > .fmask 0x00000000, 0 > - PTR_ADDIU sp, -SZREG > - cfi_adjust_cfa_offset (SZREG) > + PTR_ADDIU sp, -2 * SZREG > + cfi_adjust_cfa_offset (2 * SZREG) > REG_S s0, (sp) > cfi_rel_offset (s0, 0) > > @@ -48,8 +48,8 @@ NESTED (syscall, SZREG, ra) > > REG_L s0, (sp) > cfi_restore (s0) > - PTR_ADDIU sp, SZREG > - cfi_adjust_cfa_offset (-SZREG) > + PTR_ADDIU sp, 2 * SZREG > + cfi_adjust_cfa_offset (-2 * 2 * SZREG) > bne a3, zero, L(error) > > ret >
On Mon, 30 Nov 2020, Adhemerval Zanella via Libc-alpha wrote: > > MIPS N64/N32 ABI request stack pointer be 16-byte alinged > > > > It seems to align what gcc assumes: > > gcc/config/mips/mips.h > > 364 #define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64) > > 2525 /* Treat LOC as a byte offset from the stack pointer and round it up > 2526 to the next fully-aligned offset. */ > 2527 #define MIPS_STACK_ALIGN(LOC) \ > 2528 (TARGET_NEWABI ? ROUND_UP ((LOC), 16) : ROUND_UP ((LOC), 8)) This is correct (the alignment being twice the register width), although in this particular case obviously hardly matters in practice, as the syscall will switch to the kernel stack right away. It's fine to get it fixed regardless of course, once a correct change has been proposed. > (It would be easier that https://www.linux-mips.org/ could show > this information easier, I could only find the old o32 ABI documentation). We largely continue relying on old SGI ABI documentation, although there used to be a wiki hosted by MIPS Technologies (MTI) where such details were summarised. Sadly with the demise of both companies this stuff is either gone or hard to track down, except for individual people's storage devices. See: <https://web.archive.org/web/20180829093347/https://dmz-portal.mips.com/wiki/Main_Page> for the old MTI wiki; unfortunately not all stuff has been archived. I can see if I can upload some stuff to linux-mips.org, either the wiki itself or my own FTP area I can link the wiki to, but mind that this site is under threat of disappearance as well and as much as I'd like to I may not be able to stop it. > > @@ -48,8 +48,8 @@ NESTED (syscall, SZREG, ra) > > > > REG_L s0, (sp) > > cfi_restore (s0) > > - PTR_ADDIU sp, SZREG > > - cfi_adjust_cfa_offset (-SZREG) > > + PTR_ADDIU sp, 2 * SZREG > > + cfi_adjust_cfa_offset (-2 * 2 * SZREG) The updated CFA adjustment does not look right to me though. Maciej
On 04/12/2020 07:57, Maciej W. Rozycki wrote: > On Mon, 30 Nov 2020, Adhemerval Zanella via Libc-alpha wrote: > >>> MIPS N64/N32 ABI request stack pointer be 16-byte alinged >>> >> >> It seems to align what gcc assumes: >> >> gcc/config/mips/mips.h >> >> 364 #define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64) >> >> 2525 /* Treat LOC as a byte offset from the stack pointer and round it up >> 2526 to the next fully-aligned offset. */ >> 2527 #define MIPS_STACK_ALIGN(LOC) \ >> 2528 (TARGET_NEWABI ? ROUND_UP ((LOC), 16) : ROUND_UP ((LOC), 8)) > > This is correct (the alignment being twice the register width), although > in this particular case obviously hardly matters in practice, as the > syscall will switch to the kernel stack right away. It's fine to get it > fixed regardless of course, once a correct change has been proposed. Indeed. > >> (It would be easier that https://www.linux-mips.org/ could show >> this information easier, I could only find the old o32 ABI documentation). > > We largely continue relying on old SGI ABI documentation, although there > used to be a wiki hosted by MIPS Technologies (MTI) where such details > were summarised. Sadly with the demise of both companies this stuff is > either gone or hard to track down, except for individual people's storage > devices. > > See: > > <https://web.archive.org/web/20180829093347/https://dmz-portal.mips.com/wiki/Main_Page> > > for the old MTI wiki; unfortunately not all stuff has been archived. > > I can see if I can upload some stuff to linux-mips.org, either the wiki > itself or my own FTP area I can link the wiki to, but mind that this site > is under threat of disappearance as well and as much as I'd like to I may > not be able to stop it. It would be good if we have a wiki entry referring to all the architecture and ABI documentation. I will check if I can start one, maybe using the distro scatter information. > >>> @@ -48,8 +48,8 @@ NESTED (syscall, SZREG, ra) >>> >>> REG_L s0, (sp) >>> cfi_restore (s0) >>> - PTR_ADDIU sp, SZREG >>> - cfi_adjust_cfa_offset (-SZREG) >>> + PTR_ADDIU sp, 2 * SZREG >>> + cfi_adjust_cfa_offset (-2 * 2 * SZREG) > > The updated CFA adjustment does not look right to me though. > > Maciej >
diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S index a9baff3c17..aab1f389aa 100644 --- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S +++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S @@ -27,10 +27,10 @@ .text NESTED (syscall, SZREG, ra) - .mask 0x00010000, -SZREG + .mask 0x00010000, -2 * SZREG .fmask 0x00000000, 0 - PTR_ADDIU sp, -SZREG - cfi_adjust_cfa_offset (SZREG) + PTR_ADDIU sp, -2 * SZREG + cfi_adjust_cfa_offset (2 * SZREG) REG_S s0, (sp) cfi_rel_offset (s0, 0) @@ -48,8 +48,8 @@ NESTED (syscall, SZREG, ra) REG_L s0, (sp) cfi_restore (s0) - PTR_ADDIU sp, SZREG - cfi_adjust_cfa_offset (-SZREG) + PTR_ADDIU sp, 2 * SZREG + cfi_adjust_cfa_offset (-2 * 2 * SZREG) bne a3, zero, L(error) ret