Message ID | b070afec747518bcb2c220b5bd6210e92d2fd094.1594568655.git.alistair.francis@wdc.com |
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State | Committed |
Headers |
Return-Path: <libc-alpha-bounces@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 40F863860C3F; Sun, 12 Jul 2020 15:57:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 40F863860C3F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1594569462; bh=qXlEngruLiNTaDeRV++ykrZ6GfPfYDQBCDInWz1ni5U=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=LnJ663ppp6ZBLzUcypg++v6pwFednjwj8mRLB9IvzizmCLw5t8xzBj3xeiZhH2oVU NkcQXCiCT9eJqJaMxD7mEJLT2YLFnjxMwCEHHBQGSvHRSO6l9Cb6ZmIR1K6gD4DXsv ijugx2r+jRNE+vgqZd6qitpYmo6JPv2dzl3uPVzY= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) by sourceware.org (Postfix) with ESMTPS id 52B713860C3C for <libc-alpha@sourceware.org>; Sun, 12 Jul 2020 15:57:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 52B713860C3C IronPort-SDR: wiSLvAg9QncfwgSU/1s2ls2F5ut1HRCMkjL/cugDXanGfJbevmsE/Ytz01WuKxghzjCIqEC0h2 dqrHOP7SjtKT8YCmYo+ChIVCmx5C0lXOfLT8MGhV7xf/FW8bwpUm2MKCiOJOmIT6sunkxjPxz4 aH8Dvmez84ujMsQoTnda2K8VzmWqMTV8vmUzRmkGw8QvBu/16DcVQlnjgxY4elgryF0vF6o1VZ uy5JW4RAEDehVwfb48UkAyFN7wgnJMdI6aebjnCd7cBr1g+/4DhOO09b7RjBX8c9KE+I/b+6Vh AI0= X-IronPort-AV: E=Sophos;i="5.75,344,1589212800"; d="scan'208";a="142401287" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 12 Jul 2020 23:57:39 +0800 IronPort-SDR: 8OeNOw/RYHc4zjlET/u77a3vSB6NxTThEGUd3q7pH1L+YLxqVsZqg+2YyoopS75GgrqjOwSBvm 2eZimZtR+vwqfPQssDF/dZhIttPh0pAB0= Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2020 08:46:10 -0700 IronPort-SDR: 43b49funT3+UfVyly5+lJhF7KwFug4UGIEjYLmQruEqPIU2f9hc7LjwFA6JQ855MhZdpwG8tUu 86O+puihKx9w== WDCIronportException: Internal Received: from usa002626.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.57.178]) by uls-op-cesaip02.wdc.com with ESMTP; 12 Jul 2020 08:57:38 -0700 To: libc-alpha@sourceware.org Subject: [PATCH v3 18/19] Documentation for the RISC-V 32-bit port Date: Sun, 12 Jul 2020 08:48:08 -0700 Message-Id: <b070afec747518bcb2c220b5bd6210e92d2fd094.1594568655.git.alistair.francis@wdc.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <cover.1594568655.git.alistair.francis@wdc.com> References: <cover.1594568655.git.alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-14.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list <libc-alpha.sourceware.org> List-Unsubscribe: <http://sourceware.org/mailman/options/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/libc-alpha/> List-Post: <mailto:libc-alpha@sourceware.org> List-Help: <mailto:libc-alpha-request@sourceware.org?subject=help> List-Subscribe: <http://sourceware.org/mailman/listinfo/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=subscribe> From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org> Reply-To: Alistair Francis <alistair.francis@wdc.com> Cc: alistair.francis@wdc.com Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" <libc-alpha-bounces@sourceware.org> |
Series |
glibc port for 32-bit RISC-V (RV32)
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Commit Message
Alistair Francis
July 12, 2020, 3:48 p.m. UTC
There is already RISC-V 64-bit port information in the documentation. Let's add some documentation entries for the RISC-V 32-bit as well. --- NEWS | 6 ++++++ README | 1 + 2 files changed, 7 insertions(+)
Comments
On 12/07/2020 12:48, Alistair Francis via Libc-alpha wrote: > There is already RISC-V 64-bit port information in the documentation. > Let's add some documentation entries for the RISC-V 32-bit as well. > --- > NEWS | 6 ++++++ > README | 1 + > 2 files changed, 7 insertions(+) > > diff --git a/NEWS b/NEWS > index 92dcb77fef..958f676b6f 100644 > --- a/NEWS > +++ b/NEWS > @@ -89,6 +89,12 @@ Major new features: > support, otherwise runtime objects linked into user code will not be > BTI compatible. > > +* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows: > + > + - rv32imac ilp32 > + - rv32imafdc ilp32 > + - rv32imafdc ilp32d > + Could you extend it by adding the minimum required gcc, binutils, and Linux version? > Deprecated and removed features, and other changes affecting compatibility: > > * Remove configure option --enable-obsolete-nsl. libnsl is only built > diff --git a/README b/README > index 903f07e484..d0f0edb393 100644 > --- a/README > +++ b/README > @@ -39,6 +39,7 @@ The GNU C Library supports these configurations for using Linux kernels: > powerpc64*-*-linux-gnu Big-endian and little-endian. > s390-*-linux-gnu > s390x-*-linux-gnu > + riscv32-*-linux-gnu > riscv64-*-linux-gnu > sh[34]-*-linux-gnu > sparc*-*-linux-gnu >
On Mon, Jul 13, 2020 at 10:25 AM Adhemerval Zanella via Libc-alpha <libc-alpha@sourceware.org> wrote: > > > > On 12/07/2020 12:48, Alistair Francis via Libc-alpha wrote: > > There is already RISC-V 64-bit port information in the documentation. > > Let's add some documentation entries for the RISC-V 32-bit as well. > > --- > > NEWS | 6 ++++++ > > README | 1 + > > 2 files changed, 7 insertions(+) > > > > diff --git a/NEWS b/NEWS > > index 92dcb77fef..958f676b6f 100644 > > --- a/NEWS > > +++ b/NEWS > > @@ -89,6 +89,12 @@ Major new features: > > support, otherwise runtime objects linked into user code will not be > > BTI compatible. > > > > +* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows: > > + > > + - rv32imac ilp32 > > + - rv32imafdc ilp32 > > + - rv32imafdc ilp32d > > + > > Could you extend it by adding the minimum required gcc, binutils, and Linux > version? Done! Alistair > > > > Deprecated and removed features, and other changes affecting compatibility: > > > > * Remove configure option --enable-obsolete-nsl. libnsl is only built > > diff --git a/README b/README > > index 903f07e484..d0f0edb393 100644 > > --- a/README > > +++ b/README > > @@ -39,6 +39,7 @@ The GNU C Library supports these configurations for using Linux kernels: > > powerpc64*-*-linux-gnu Big-endian and little-endian. > > s390-*-linux-gnu > > s390x-*-linux-gnu > > + riscv32-*-linux-gnu > > riscv64-*-linux-gnu > > sh[34]-*-linux-gnu > > sparc*-*-linux-gnu > >
On Sun, 12 Jul 2020, Alistair Francis via Libc-alpha wrote: > diff --git a/NEWS b/NEWS > index 92dcb77fef..958f676b6f 100644 > --- a/NEWS > +++ b/NEWS > @@ -89,6 +89,12 @@ Major new features: > support, otherwise runtime objects linked into user code will not be > BTI compatible. > > +* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows: These really ought to be proper sentences and document the extra kernel version requirement, so how about (pinching from the original RV64 note): * Support for the RISC-V ISA running on Linux has been expanded to run on 32-bit hardware. This requires at least Linux 5.4 and is supported for the following ISA and ABI pairs: ? Maciej
On Tue, Jul 14, 2020 at 5:53 PM Maciej W. Rozycki via Libc-alpha <libc-alpha@sourceware.org> wrote: > > On Sun, 12 Jul 2020, Alistair Francis via Libc-alpha wrote: > > > diff --git a/NEWS b/NEWS > > index 92dcb77fef..958f676b6f 100644 > > --- a/NEWS > > +++ b/NEWS > > @@ -89,6 +89,12 @@ Major new features: > > support, otherwise runtime objects linked into user code will not be > > BTI compatible. > > > > +* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows: > > These really ought to be proper sentences and document the extra kernel > version requirement, so how about (pinching from the original RV64 note): > > * Support for the RISC-V ISA running on Linux has been expanded to run on > 32-bit hardware. This requires at least Linux 5.4 and is supported for > the following ISA and ABI pairs: Updated. Alistair > > ? > > Maciej
diff --git a/NEWS b/NEWS index 92dcb77fef..958f676b6f 100644 --- a/NEWS +++ b/NEWS @@ -89,6 +89,12 @@ Major new features: support, otherwise runtime objects linked into user code will not be BTI compatible. +* Support RISC-V port for 32-bit. The ISA and ABI pairs supported as follows: + + - rv32imac ilp32 + - rv32imafdc ilp32 + - rv32imafdc ilp32d + Deprecated and removed features, and other changes affecting compatibility: * Remove configure option --enable-obsolete-nsl. libnsl is only built diff --git a/README b/README index 903f07e484..d0f0edb393 100644 --- a/README +++ b/README @@ -39,6 +39,7 @@ The GNU C Library supports these configurations for using Linux kernels: powerpc64*-*-linux-gnu Big-endian and little-endian. s390-*-linux-gnu s390x-*-linux-gnu + riscv32-*-linux-gnu riscv64-*-linux-gnu sh[34]-*-linux-gnu sparc*-*-linux-gnu